Monolithic Power Systems Inc. MP20043DGT-D-LF-Z

Overview

MP20043DGT-D-LF-Z from Monolithic Power Systems is a dual-channel, 300mA low-dropout linear regulator with programmable output voltage (1.2V–3.3V in 100mV steps), ±2.5% accuracy, 75dB PSRR at 1kHz, and integrated output discharge. It uses internal PMOS pass devices, delivers 7μVRMS output noise, and supports independent channel enable via EN1/EN2 pins for battery-powered wireless LAN and handheld equipment.

For engineers reviewing the MP20043DGT-D-LF-Z datasheet, MP20043DGT-D-LF-Z pinout, MP20043DGT-D-LF-Z application, or MP20043DGT-D-LF-Z equivalent, key selection criteria include programmable dual-voltage configuration, 60mV dropout at 100mA, shutdown current <1µA, thermal protection at 140°C, and TQFN8 (2mm×2mm) package compatibility with space-constrained PCB layouts.

Technical Context

The MP20043 implements two independent LDO channels using P-channel MOSFET pass elements, enabling ultra-low dropout (60mV @ 100mA) and near-zero quiescent current (150µA dual-channel active, <1µA shutdown). Its programmable voltage matrix relies on binary-state inputs P1/P2 (High/Low/Open) to select one of nine pre-defined VOUT1/VOUT2 pairs per combination A–E.

Each channel features dedicated overcurrent limiting (660mA short-circuit limit), thermal shutdown with 10°C hysteresis, and active output discharge (20–100Ω resistance) during disable. The device operates across 2.5V–5.5V input while maintaining 75dB AC PSRR up to 1kHz and 7μVRMS integrated noise (10Hz–30kHz).

Key Specifications

Pinout & Package

TQFN8 (2mm × 2mm) package with exposed thermal pad; RoHS-compliant, halogen-free, lead-free construction.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-channel programmable LDO applications.

Compared with XC6216Dxx1MR-G and RT9013-xxPB, MP20043DGT-D-LF-Z uniquely delivers dual independent programmable outputs, integrated discharge, 75dB PSRR, and sub-1µA shutdown - making it the only solution meeting simultaneous requirements for compact battery-powered multi-rail systems with strict noise and sequencing control.

Availability

MP20043DGT-D-LF-Z is available at Aetrix Electronics and suitable for wireless LAN modules, battery-powered handheld devices, and laptop subsystem power requiring stable component supply, consistent parametric performance, and long-term production continuity.

Supply support for MP20043DGT-D-LF-Z includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and power ICs, with design centers in the US, China, and Taiwan.

The MP20043 belongs to MPS's precision dual-LDO product line, engineered specifically for battery-powered portable electronics needing programmable, low-noise, low-IQ dual-rail regulation in ultra-small packages.

FAQ

What are the valid logic states for P1 and P2 pins, and how do they affect output voltage?

P1 and P2 accept three valid states: High (≥1.6V), Low (≤0.4V), or Open (floating). Their combined state selects one of nine predefined VOUT1/VOUT2 pairs per datasheet Combination A–E. For example, P1=Open and P2=Open yields VOUT1=2.8V and VOUT2=3.3V in Combination A. Each combination defines distinct voltage mappings, and the top marking (e.g., "4N" for MP20043DGT-A-LF-Z) indicates which combination is factory-configured.

Does MP20043DGT-D-LF-Z require external capacitors, and what are the recommended values?

Yes: a minimum 0.47µF ceramic input capacitor (X5R/X7R) is required at VIN, and each output needs a 0.47–10µF ceramic capacitor with ESR <1Ω. Larger values improve transient response and noise suppression but increase board area. Tantalum capacitors are acceptable but less optimal due to higher ESR and reliability concerns under bias.

How does the output discharge function operate, and what is its resistance value?

When EN1 or EN2 is driven low, the corresponding VOUT pin activates an internal 20–100Ω discharge path to GND, actively pulling the output voltage to zero within milliseconds. This prevents floating rails that could cause downstream latch-up or undefined logic states during power-down sequences in multi-rail systems.

What is the maximum allowable power dissipation, and how is it calculated?

Maximum continuous power dissipation is 1.5W at TA=25°C, derived from θJA=80°C/W and TJ(MAX)=125°C. Using PD(MAX)=(TJ−TA)/θJA, dissipation must stay below (125−TA)/80 W. At 85°C ambient, max PD drops to 0.5W. Thermal derating is essential - use the exposed paddle and solid ground plane to maintain junction temperature ≤125°C.

Can EN1 and EN2 be left unconnected, or must they be actively driven?

EN1 and EN2 must never be left floating. They must be tied either to VIN (to enable the channel permanently) or to GND (to disable it). Floating EN pins cause unpredictable behavior, including partial turn-on, increased leakage, or oscillation. Internal bias currents (100nA) are insufficient to guarantee a defined logic level without explicit connection.

Is MP20043DGT-D-LF-Z compatible with other MP20043 variants like -A-LF-Z or -C-LF-Z?

Yes - all MP20043 variants share identical pinout, electrical characteristics, and package. The suffix (-A, -B, -C, -D, -E) denotes factory-programmed voltage combination (e.g., -D corresponds to Combination D, though not detailed in Rev.1.1). Functionally interchangeable in layout and routing; only output voltage mapping differs based on top marking and P1/P2 configuration.

What is the significance of the "4N" top marking on MP20043DGT-D-LF-Z?

The "4N" top marking identifies the device as configured for Combination A per the datasheet - the default factory setting used for evaluation and general-purpose applications. It confirms the internal voltage mapping table (e.g., P1/P2=Open/Open → VOUT1=2.8V/VOUT2=3.3V) and distinguishes it from -A-LF-Z (4N), -B-LF-Z (6X), -C-LF-Z (3Z), and -E-LF-Z (AH) variants.