Monolithic Power Systems Inc. MP2004DJ-DD-LF-Z
- Part No.:
- MP2004DJ-DD-LF-Z
- Manufacturer:
- Monolithic Power Systems Inc.
- Package:
- SOT-23-6 Thin, TSOT-23-6
- Datasheet:
-
MP2004DJ-DD-LF-Z.pdf
- Description:
- IC REG LIN 1.85V/1.85V TSOT23-6
- Quantity:
- Payment:

- Shipping:

Inventory:4,696
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Product details
Overview
MP2004DJ-DD-LF-Z from Monolithic Power Systems is a dual-channel, low-noise, high-PSRR linear regulator delivering two independent 1.85V outputs at up to 200mA per channel, with 1% output accuracy, 95μVRMS noise, and 69dB PSRR at 100Hz-designed for power-sensitive portable electronics requiring stable dual-rail biasing.
For engineers reviewing the MP2004DJ-DD-LF-Z datasheet, MP2004DJ-DD-LF-Z pinout, MP2004DJ-DD-LF-Z application, or MP2004DJ-DD-LF-Z equivalent, this device supports independent enable control (EN1/EN2), ultra-low quiescent current (114μA), fast transient response with small ceramic capacitors, and thermal/current protection in a space-constrained TSOT23-6 package.
Technical Context
The MP2004DJ-DD-LF-Z integrates two independent PMOS-based LDOs with separate enable inputs, enabling selective channel shutdown to achieve near-zero standby current (0.03–1μA). Its architecture eliminates reverse current conduction via internal PMOS pass devices while maintaining low dropout (110mV @ 100mA) and tight load regulation (±1%).
Each channel features dedicated current limiting (450mA trip) and thermal shutdown (140°C with 10°C hysteresis), operating across –40°C to +85°C ambient. Input voltage range is 2.5V to 6.0V, supporting single-supply operation for mixed-voltage SoC subsystems.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltage | 1.85V per channel, ±1% accuracy ensures reliable core/bias rail tolerance for 1.8V logic and RF circuitry. |
| Max Output Current | 200mA per channel-supports dual low-power processors, sensors, or memory interfaces without external boost. |
| PSRR | 69dB at 100Hz-rejects switching noise from adjacent DC/DC converters in compact PCB layouts. |
| Output Noise | 95μVRMS (10Hz–100kHz)-meets stringent analog/RF supply requirements without additional filtering. |
| Dropout Voltage | 110mV @ 100mA-enables efficient operation from 2.5V input down to 1.85V output, minimizing power loss. |
| Quiescent Current | 114μA (both channels active)-extends battery life in always-on monitoring or sleep-mode subsystems. |
| Enable Threshold | VIH = 1.6V, VIL = 0.45V-compatible with 1.8V/3.3V GPIOs for precise digital control of each LDO. |
Pinout & Package
MP2004DJ-DD-LF-Z is housed in a 6-pin TSOT23 package (JEDEC MO-193 AB), with exposed pad not electrically connected. Pin 1 (VOUT2) is bottom-left when top marking is read left-to-right.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | VOUT2 | Channel 2 regulated output (1.85V); requires local 0.47–10μF ceramic capacitor for stability and transient response. |
| 2 | GND | Common ground reference for both regulators; must connect to large copper area for thermal dissipation and noise reduction. |
| 3 | EN2 | Active-high enable for Channel 2; must be tied to VIN or controlled logic-floating prohibited to prevent erratic behavior. |
| 4 | EN1 | Active-high enable for Channel 1; enables independent power sequencing or dynamic rail gating in multi-domain systems. |
| 5 | VIN | Shared input supply (2.5–6.0V); feeds both LDOs; requires ≥0.47μF ceramic bypass capacitor close to pin. |
| 6 | VOUT1 | Channel 1 regulated output (1.85V); electrically isolated from VOUT2-supports split-rail or redundant biasing schemes. |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent LDOs | Two fully decoupled 1.85V/200mA regulators sharing only VIN and GND-enables asymmetric power-up, fault isolation, and rail-specific enable timing. |
| Low-noise regulation | 95μVRMS output noise over 10Hz–100kHz allows direct powering of ADC references, PLLs, and RF front-ends without post-regulation filtering. |
| High PSRR at low frequency | 69dB rejection at 100Hz suppresses ripple from buck converter switching edges and system-level supply coupling in mixed-signal designs. |
| Ultra-low IQ with shutdown | 114μA typical quiescent current (both on); drops to ≤1μA when both EN pins grounded-critical for battery runtime in IoT edge nodes. |
| Thermal & current protection | Integrated 140°C thermal shutdown with 10°C hysteresis and per-channel 450mA current limit-prevents damage during overload or PCB thermal stress. |
Applications
| Wireless Sensor Node Power | Mobile SoC Core/Bias Rails |
|---|---|
Use Scenario: Ultra-low-power environmental sensor node powered by coin cell or energy harvester, requiring stable dual 1.85V rails for MCU and RF transceiver. IC Role / Device Role / Timing Role: Dual LDO providing independently enabled, low-noise, low-IQ bias for microcontroller core and sub-GHz transceiver IC. Use Value: Enables >1-year battery life via per-rail shutdown (EN1/EN2), while 95μVRMS noise prevents RF desense and ADC quantization errors. |
Use Scenario: Compact handheld device using a dual-core application processor with separate I/O and core voltage domains, both rated at 1.85V. IC Role / Device Role / Timing Role: Dual-output LDO supplying matched 1.85V rails with tight tracking and independent enable for sequenced power-up. Use Value: Eliminates need for two discrete LDOs-reducing BOM count, PCB area, and layout complexity while maintaining ±1% output matching. |
| Portable Medical Monitor Front-End | Industrial Handheld Data Logger |
Use Scenario: Battery-powered ECG monitor requiring clean analog supply for precision op-amps and ADC, plus stable digital rail for microcontroller. IC Role / Device Role / Timing Role: Dual LDO delivering isolated 1.85V analog and digital supplies with high PSRR to reject digital switching noise. Use Value: 69dB PSRR at 100Hz and 95μVRMS noise ensure <1 LSB error in 16-bit medical-grade ADC conversion. |
Use Scenario: Ruggedized field data logger with flash memory, real-time clock, and RS-485 interface-all operating at 1.85V under wide temperature (-40°C to +85°C). IC Role / Device Role / Timing Role: Dual LDO providing robust, thermally protected 1.85V rails across industrial temperature range with minimal derating. Use Value: Built-in thermal shutdown (140°C) and current limiting allow continuous operation in sealed enclosures without forced cooling. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-LDO applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Torex XC6216D182MR-G | Single-channel 1.8V LDO (200mA), no dual output or independent enables; PSRR = 60dB @ 100Hz; noise = 15μVRMS. | Requires two units for dual-rail use; lacks per-channel shutdown; better noise but lower PSRR and no thermal protection. | Select only if ultra-low noise dominates over integration, sequencing, and protection needs. |
| Richtek RT9013-18GJ5 | Single-channel 1.8V LDO (300mA); no dual output; PSRR = 70dB @ 100Hz; noise = 45μVRMS; includes thermal shutdown. | Higher current capability but no channel independence; cannot replicate EN1/EN2 sequencing or rail isolation. | Choose when higher per-rail current (>200mA) is required and dual-rail coordination is unnecessary. |
Compared with XC6216D182MR-G and RT9013-18GJ5, MP2004DJ-DD-LF-Z uniquely delivers matched dual 1.85V outputs with independent enable, integrated protection, and balanced PSRR/noise performance-making it optimal for space- and power-constrained dual-rail systems where integration and control matter more than marginal noise or current improvements.
Availability
MP2004DJ-DD-LF-Z is available at Aetrix Electronics and suitable for wireless sensor nodes, portable medical monitors, industrial handheld data loggers, and mobile SoC power management requiring stable component supply with RoHS-compliant, tape-and-reel packaging.
Supply support for MP2004DJ-DD-LF-Z includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and power ICs, with expertise in DC/DC converters, LDOs, motor drivers, and LED drivers for consumer, industrial, and automotive markets.
The MP2004 product line targets ultra-low-power, space-constrained portable electronics-delivering dual, low-noise, high-PSRR LDOs with independent control to replace discrete solutions in battery-powered and mixed-signal applications.
FAQ
What is the exact output voltage tolerance for MP2004DJ-DD-LF-Z?
The MP2004DJ-DD-LF-Z delivers 1.85V per channel with ±1% initial accuracy over load (1mA–200mA), temperature (–40°C to +85°C), and line (VIN = 2.5V–6.0V) conditions, verified per Electrical Characteristics table in Rev. 0.92 datasheet.
Can MP2004DJ-DD-LF-Z operate with input voltage below 2.5V?
No. The absolute minimum recommended input voltage is 2.5V per the Recommended Operating Conditions table. Operation below 2.5V may cause output regulation failure or undefined behavior, as the internal PMOS pass device requires sufficient gate drive margin.
Is an external Schottky diode required for reverse current protection?
Yes-when VOUT exceeds VIN by >0.3V (e.g., during hot-swap or backup supply scenarios), the internal PMOS body diode conducts. An external Schottky diode (anode to VIN, cathode to VOUT) is required to block reverse current and prevent misoperation, as specified in Application Information section.
What is the maximum allowable power dissipation at 85°C ambient?
Using θJA = 220°C/W and TJ(MAX) = 125°C, maximum continuous power dissipation at TA = 85°C is PD(MAX) = (125 – 85) / 220 ≈ 182mW. Exceeding this risks thermal shutdown; PCB copper area and airflow significantly impact real-world limits.
Does MP2004DJ-DD-LF-Z support output capacitor ESR outside the 0–1.2Ω range?
No. Stability is guaranteed only with output capacitors having ESR ≤1.2Ω (per Figure 2). Higher ESR risks oscillation; lower ESR (e.g., <10mΩ) is acceptable but requires careful layout to avoid ringing-ceramic capacitors within 0.47–10μF are validated.
How does the current limit behave during overload?
Each channel has independent current limiting that clamps output current at ~450mA (typical) when load resistance drops below ~4.1Ω. Output voltage collapses to maintain current limit, and thermal shutdown activates if sustained-no latch-off; recovery occurs after cooldown.
Are EN1 and EN2 logic-compatible with 1.2V I/O systems?
No. EN1/EN2 require VIH ≥1.6V (min) and VIL ≤0.45V (max) per datasheet specs. Driving them from 1.2V GPIO will not guarantee reliable turn-on; level-shifting or 1.8V+ logic sources are required for guaranteed operation.
MP2004DJ-DD-LF-Z Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Monolithic Power Systems Inc.
- Series:
- -
- Package/Case:
- SOT-23-6 Thin, TSOT-23-6
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Not For New Designs
- Output Configuration:
- Positive
- Output Type:
- Fixed
- Number of Regulators:
- 2
- Voltage - Input (Max):
- 6V
- Voltage - Output (Min/Fixed):
- 1.85V, 1.85V
- Voltage - Output (Max):
- -
- Voltage Dropout (Max):
- 0.25V @ 200mA (Typ), 0.25V @ 200mA (Typ)
- Current - Output:
- 200mA, 200mA
- Current - Quiescent (Iq):
- 114 µA
- Current - Supply (Max):
- -
- PSRR:
- 69dB (100Hz)
- Control Features:
- Enable
- Protection Features:
- Over Current, Over Temperature
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- TSOT-23-6
MP2004DJ-DD-LF-Z FAQ
1.How can I place an order for MP2004DJ-DD-LF-Z through Aetrix?
Please submit a Request for Quotation (RFQ) for MP2004DJ-DD-LF-Z on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MP2004DJ-DD-LF-Z reliable?
The price and inventory of MP2004DJ-DD-LF-Z are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MP2004DJ-DD-LF-Z is usually 5 days.
3.What payment methods are accepted for MP2004DJ-DD-LF-Z?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MP2004DJ-DD-LF-Z transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MP2004DJ-DD-LF-Z?
MP2004DJ-DD-LF-Z orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MP2004DJ-DD-LF-Z order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MP2004DJ-DD-LF-Z?
For technical support, including MP2004DJ-DD-LF-Z datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MP2004DJ-DD-LF-Z requirements.
6.How does Aetrix verify that MP2004DJ-DD-LF-Z is sourced from the original manufacturer or authorized distributors?
All MP2004DJ-DD-LF-Z products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MP2004DJ-DD-LF-Z meets industry standards.
7.What is the process for return or replacement of MP2004DJ-DD-LF-Z?
All MP2004DJ-DD-LF-Z units undergo pre-shipment inspection (PSI). If there is an issue with MP2004DJ-DD-LF-Z, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MP2004DJ-DD-LF-Z part is unused and in its original packaging.
Return procedure for MP2004DJ-DD-LF-Z:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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