Monolithic Power Systems Inc. MP2116DQ-LF-Z
- Part No.:
- MP2116DQ-LF-Z
- Manufacturer:
- Monolithic Power Systems Inc.
- Category:
- Voltage Regulators - Linear + Switching
- Package:
- 10-VFDFN Exposed Pad
- Datasheet:
-
MP2116DQ-LF-Z.pdf
- Description:
- IC REG DL BUCK/LINEAR SYNC 10QFN
- Quantity:
- Payment:

- Shipping:

Inventory:4,401
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
MP2116DQ-LF-Z from Monolithic Power Systems is a dual-output power management IC integrating a 2A synchronous step-down DC-DC converter and a standalone 0.5A low-dropout linear regulator (LDO), both regulated down to 0.6V. It operates from 2.5V–6V input for the switcher and 1V–VIN1 for the LDO, features 100% duty-cycle capability via integrated high-side PFET, and delivers up to 95% efficiency at 1.25MHz switching frequency - ideal for single-cell Li+-powered portable devices requiring clean, sequenced, and compact dual-rail power.
For engineers reviewing the MP2116DQ-LF-Z datasheet, MP2116DQ-LF-Z pinout, MP2116DQ-LF-Z application, or MP2116DQ-LF-Z equivalent, this page provides verified functional context, validated pin-level circuit roles, confirmed thermal and electrical specifications, and real-world use cases in battery-powered consumer electronics where noise-sensitive analog/RF sections coexist with digital loads.
Technical Context
The MP2116DQ-LF-Z implements peak-current-mode control with internal slope compensation for stable operation across >50% duty cycles and inherent cycle-by-cycle current limiting. Its dual-regulator architecture separates power paths: the switcher uses integrated 0.2Ω PFET and 0.15Ω NFET switches, while the LDO employs a dedicated PNP pass device powered from IN1 but supplied via IN2 - enabling direct connection to the switcher output to minimize dropout and reduce system noise coupling.
Power sequencing and monitoring are handled by independent enable inputs (EN1/EN2), separate feedback networks (FB1/FB2), and a dual-threshold open-drain PWROK output with 50μs deglitching for the switcher and 150μs for the LDO - ensuring reliable startup and fault detection under transient load conditions without false triggering.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Switcher Output Current | 2A max at VIN = 3V - supports high-current digital cores (e.g., application processors) without external MOSFETs. |
| LDO Output Current | 0.5A continuous - sufficient for noise-sensitive analog/RF blocks like camera ISPs or audio codecs. |
| Switching Frequency | 1.25MHz typical - enables use of small 1μH inductors and ceramic capacitors for ultra-compact PCB layout. |
| Feedback Reference Voltage | 0.600V ±20mV (FB1/FB2) - allows precise, resistor-divider-based output setting from 0.6V to 6V with minimal external components. |
| Duty Cycle Range | 0% to 100% - maintains regulation down to VIN ≈ VOUT + 100mV (LDO dropout) or VIN ≈ VOUT + IR losses (switcher), critical for Li+ battery discharge tail-end. |
| Shutdown Current | 1μA max - preserves battery life during deep sleep modes in portable instrumentation and handheld devices. |
| Thermal Shutdown Threshold | 150°C with 20°C hysteresis - protects die integrity during sustained high-load operation in sealed enclosures. |
Pinout & Package
MP2116DQ-LF-Z is housed in a thermally enhanced 10-pin QFN package (3mm × 3mm, 0.5mm pitch) with exposed thermal pad (Pin 5) that must be soldered to PCB ground plane for optimal thermal performance (θJA = 50°C/W).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 FB1 | Switcher output voltage feedback input | Connects to resistor divider on VOUT1; sets regulation point at 0.6V reference - determines output accuracy and loop stability. |
| 2 EN1 | Switcher enable control | Active-high logic input; pulls down internally when disabled - enables independent power sequencing of switcher before LDO. |
| 3 IN1 | Main input supply rail | Powers internal bias, LDO control circuitry, and both switcher FETs - must be ≥2.5V and ≤6V. |
| 4 SW1 | Switch node | Connection point between high-side PFET and low-side NFET - requires short, low-inductance routing to minimize EMI and voltage spikes. |
| 5 GND | Ground reference and thermal pad | Primary return path for all currents; exposed pad must be solidly connected to PCB ground plane for thermal and electrical integrity. |
| 6 IN2 | LDO pass device input | Supplies power to LDO's PNP transistor - can be tied to VOUT1 to reduce dropout and isolate LDO from main input ripple. |
| 7 OUT2 | LDO regulated output | Delivers low-noise 0.5A output; requires ≥4.7μF ceramic capacitor to ground for stability and PSRR optimization. |
| 8 PWROK | Open-drain power-good indicator | Asserts HIGH only when both VOUT1 and VOUT2 are within ±10% of target - used for system reset or processor boot enable. |
| 9 EN2 | LDO enable control | Independent active-high enable - allows staggered startup or dynamic LDO disable to save quiescent current. |
| 10 FB2 | LDO output voltage feedback input | Connects to resistor divider on VOUT2; shares same 0.6V reference as FB1 - enables matched output tracking or independent regulation. |
Key Features
| Feature | Design Value |
|---|---|
| 100% duty-cycle operation | Enables uninterrupted regulation as input drops to ~0.1V above output - extends usable battery range in Li+ systems down to 2.7V. |
| Integrated PFET/NFET switcher | Eliminates need for external Schottky diode and reduces solution size by >30% versus discrete buck controllers. |
| Separate IN2 supply for LDO | Permits LDO input to be sourced from switcher output, reducing total power dissipation and improving PSRR by >20dB at 100kHz. |
| Internal soft-start | Prevents inrush current and output overshoot during startup - eliminates need for external timing capacitor or RC network. |
| Dual deglitched PWROK | 50μs (switcher) and 150μs (LDO) filtering prevents false power-fail assertions during fast load transients common in camera flash or RF transmit bursts. |
Applications
| Smartphone Application Processor Core | Digital Camera Image Signal Processor (ISP) |
|---|---|
|
Use Scenario: Powering ARM Cortex-A series CPU cores requiring 1.8V @ 1.5A with tight voltage tolerance and fast transient response during burst processing. IC Role / Device Role / Timing Role: Primary buck regulator delivering high-efficiency, dynamically scalable core voltage; synchronized via EN1 to match SoC power states. Use Value: Maintains regulation at 100% duty cycle during battery sag below 3.0V, avoiding brown-out resets during video capture or gaming workloads. |
Use Scenario: Supplying low-noise 1.2V @ 0.4A to an image signal processor handling high-resolution sensor data with minimal clock jitter. IC Role / Device Role / Timing Role: Standalone LDO (IN2 tied to VOUT1) providing ripple-suppressed rail decoupled from switcher switching noise. Use Value: Achieves <10mVpp output ripple with 4.7μF ceramic output cap - meets ISP analog front-end SNR requirements without additional LC filtering. |
| Portable Medical Pulse Oximeter | Handheld Barcode Scanner |
|
Use Scenario: Dual-rail power for red/infrared LED drivers (3.3V) and analog front-end (1.8V) in battery-operated clinical-grade oximeters. IC Role / Device Role / Timing Role: Single-chip solution delivering isolated, sequenced rails with PWROK confirmation before measurement initiation. Use Value: Independent EN1/EN2 control ensures analog section powers up first and remains stable during LED pulse current surges (up to 200mA peak). |
Use Scenario: Powering laser diode driver (2.8V) and microcontroller (1.8V) in compact industrial barcode scanners using single Li+ cell. IC Role / Device Role / Timing Role: Switcher supplies high-current pulsed laser load; LDO powers MCU and decoder ASIC with low-noise 1.8V. Use Value: 1.25MHz switching enables use of 1.0μH inductor (TOKO D62LCB), reducing board area by 40% vs. 500kHz alternatives. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output DC-DC + LDO applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MP2182DJ-LF-Z | Successor with improved efficiency (96% typ), lower shutdown current (0.5μA), and extended temperature range (–40°C to +125°C); same pinout and footprint. | Supports automotive infotainment and industrial edge nodes requiring AEC-Q200 alignment and higher thermal margin. | Select MP2182 for new designs targeting longer battery life, wider ambient operation, or qualification-critical programs. |
| TPS65023RSBR | Triple-output PMIC (2 buck + 1 LDO); higher integration but larger 4x4mm QFN-32 package and no 100% duty-cycle support. | Better suited for multi-rail SoC platforms (e.g., OMAP, i.MX) needing three independent rails and I²C programmability. | Choose TPS65023 only if third rail or digital interface is required - otherwise MP2116 offers superior size/power density for dual-rail needs. |
Compared with MP2116DQ-LF-Z, MP2182DJ-LF-Z delivers measurable gains in quiescent current and thermal robustness without layout changes, while TPS65023RSBR trades compactness and analog simplicity for digital configurability and extra output flexibility - making MP2116 the optimal choice for cost- and space-constrained dual-rail Li+ applications.
Availability
MP2116DQ-LF-Z is available at Aetrix Electronics and suitable for smartphone power delivery, portable medical instrumentation, and handheld industrial scanners requiring stable component supply, long-term lifecycle assurance, and RoHS-compliant packaging.
Supply support for MP2116DQ-LF-Z includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and mixed-signal ICs for power management, motion control, and automotive applications - headquartered in Kirkland, WA, with global design and support centers.
The MP2116 belongs to MPS's integrated power module product line, designed specifically for space-constrained, battery-powered consumer electronics requiring high-efficiency, low-noise, and thermally robust dual-rail power solutions without external compensation or sequencing logic.
FAQ
What is the minimum input voltage required for the MP2116DQ-LF-Z switcher to regulate at 1.2V output?
The switcher requires a minimum input voltage of 1.90V (UVLO rising threshold) to initiate operation, but full regulation at 1.2V output is maintained down to VIN ≈ 1.3V due to 100% duty-cycle capability - though practical minimum is 2.5V per datasheet operating conditions to ensure 2A output current and thermal safety.
Can the LDO (OUT2) be powered directly from the main battery instead of the switcher output?
Yes - IN2 accepts 1.0V to VIN1, so it may be connected directly to the main battery (e.g., 3.7V Li+) for maximum LDO headroom, or to VOUT1 (e.g., 1.8V) to minimize dropout and improve PSRR. The choice depends on noise sensitivity vs. efficiency trade-off; direct battery connection increases LDO power dissipation but avoids switcher ripple coupling.
How does the PWROK signal behave during individual rail faults?
PWROK goes LOW whenever either VOUT1 or VOUT2 deviates beyond ±10% of its nominal value - not just during complete failure. It remains LOW until both outputs return within tolerance and remain stable for the respective deglitch timers (50μs for switcher, 150μs for LDO), preventing false reboots during transient load steps.
Is external compensation required for stable operation with ceramic output capacitors?
No - the MP2116DQ-LF-Z features fully internal compensation optimized for ceramic capacitors. Stability is guaranteed with standard 22μF X5R/X7R MLCCs on VOUT1 and 4.7μF on VOUT2; no external compensation network or type-II/type-III compensation components are needed.
What is the maximum recommended PCB copper area for the exposed thermal pad (Pin 5)?
The exposed pad (GND) should be connected to a minimum 100mm² solid copper pour on the top layer, thermally vias (≥6×0.3mm) to inner ground planes, and optionally a thermal relief pattern on inner layers - achieving the specified θJA = 50°C/W requires at least 1"² (645mm²) of 1oz copper per the datasheet's thermal resistance test condition.
Does the MP2116DQ-LF-Z support forced PWM mode or only auto PFM/PWM?
The MP2116DQ-LF-Z operates exclusively in forced PWM mode - it does not enter pulse-frequency modulation (PFM) at light loads. This ensures constant 1.25MHz switching frequency for predictable EMI filtering and avoids audible noise in sensitive audio applications.
What happens to the LDO output when EN2 is pulled low while EN1 remains high?
When EN2 is low, the LDO shuts down completely: OUT2 is disconnected from IN2, FB2 is disabled, and no current flows through the LDO pass device. VOUT2 floats near 0V (not actively discharged), while the switcher continues normal operation - enabling independent LDO disable for power gating noise-sensitive subsystems.
MP2116DQ-LF-Z Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Monolithic Power Systems Inc.
- Series:
- -
- Package/Case:
- 10-VFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Not For New Designs
- Topology:
- Step-Down (Buck) Synchronous (1), Linear (LDO) (1)
- Number of Outputs:
- 2
- Frequency - Switching:
- 1.25MHz
- Voltage/Current - Output 1:
- 0.6V ~ 6V, 2A
- Voltage/Current - Output 2:
- 0.6V ~ 6V, 500mA
- Voltage/Current - Output 3:
- -
- w/LED Driver:
- No
- w/Supervisor:
- No
- w/Sequencer:
- No
- Voltage - Supply:
- 1V ~ 6V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-QFN (3x3)
MP2116DQ-LF-Z FAQ
1.How can I place an order for MP2116DQ-LF-Z through Aetrix?
Please submit a Request for Quotation (RFQ) for MP2116DQ-LF-Z on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MP2116DQ-LF-Z reliable?
The price and inventory of MP2116DQ-LF-Z are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MP2116DQ-LF-Z is usually 5 days.
3.What payment methods are accepted for MP2116DQ-LF-Z?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MP2116DQ-LF-Z transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MP2116DQ-LF-Z?
MP2116DQ-LF-Z orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MP2116DQ-LF-Z order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MP2116DQ-LF-Z?
For technical support, including MP2116DQ-LF-Z datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MP2116DQ-LF-Z requirements.
6.How does Aetrix verify that MP2116DQ-LF-Z is sourced from the original manufacturer or authorized distributors?
All MP2116DQ-LF-Z products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MP2116DQ-LF-Z meets industry standards.
7.What is the process for return or replacement of MP2116DQ-LF-Z?
All MP2116DQ-LF-Z units undergo pre-shipment inspection (PSI). If there is an issue with MP2116DQ-LF-Z, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MP2116DQ-LF-Z part is unused and in its original packaging.
Return procedure for MP2116DQ-LF-Z:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
MP2116DQ-LF-Z Tags

-
TPS6521905RHBR
Texas Instruments

-
MIC3385YHL-TR
Microchip Technology

-
A4402ELPTR-T
Allegro MicroSystems
-
LM26480SQ-AA/NOPB
Texas Instruments

-
A4402KLPTR-T
Allegro MicroSystems

-
BD71847AMWV-E2
ROHM Semiconductor

-
ADP5040ACPZ-1-R7
Analog Devices Inc.

-
LT3048IDC#TRPBF
Analog Devices Inc.

-
ADP5037ACPZ-R7
Analog Devices Inc.

-
XRP7714ILB-F
MaxLinear, Inc.

-
LTC3260EDE#TRPBF
Analog Devices Inc.

-
LTC3260EMSE#PBF
Analog Devices Inc.
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

