Monolithic Power Systems Inc. MP2125DL-LF-Z
- Part No.:
- MP2125DL-LF-Z
- Manufacturer:
- Monolithic Power Systems Inc.
- Package:
- 14-VFDFN Exposed Pad
- Datasheet:
-
MP2125DL-LF-Z.pdf
- Description:
- IC REG BUCK ADJ 1.5A DL 14QFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
MP2125DL-LF-Z from Monolithic Power Systems is a dual-channel synchronous step-down DC/DC converter with integrated 1.5A high-side PFET and low-side NFET per channel, operating from 2.7V–6V input and delivering adjustable 0.8V–VIN outputs. It features fixed 1.2MHz switching frequency, 100% duty-cycle capability for low-dropout operation, and cycle-by-cycle overcurrent protection-designed for Li+-battery-powered portable instruments and digital cameras.
For engineers reviewing the MP2125DL-LF-Z datasheet, MP2125DL-LF-Z pinout, MP2125DL-LF-Z application, or MP2125DL-LF-Z equivalent, key selection criteria include dual independent enable control (EN1/EN2), separate PVIN/VIN power routing per channel, thermal shutdown at 150°C, and QFN14 (3mm×4mm) package compatibility with ceramic output capacitors and 3.3μH inductors.
Technical Context
The MP2125DL-LF-Z implements peak current-mode PWM control with internal slope compensation and a dedicated 1.2MHz oscillator, enabling stable regulation across 0–1.5A load per channel without external compensation. Each channel uses independent feedback (FB1/FB2) and power supply pins (PVIN1/VIN1, PVIN2/VIN2) to isolate power FET drive from controller logic.
It integrates dual high-side PFETs (RDS(on) = 0.25Ω) and synchronous NFET rectifiers (RDS(on) = 0.2Ω), supports 100% duty cycle for dropout operation, and includes thermal shutdown (150°C trip, 20°C hysteresis), short-circuit protection via frequency reduction, and undervoltage lockout (2.4V typ., 160mV hysteresis).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 2.7V to 6V - supports single-cell Li-ion battery operation with UVLO at 2.4V (±0.25V). |
| Output Current per Channel | Up to 1.5A continuous - limited by thermal design; max junction temp 150°C, θJA = 50°C/W. |
| Switching Frequency | Fixed 1.2MHz (±0.2MHz) - enables compact 3.3μH inductor and 22μF ceramic output capacitor use. |
| Feedback Reference Voltage | 0.800V ±24mV (–40°C to +85°C) - sets output via resistor divider; enables 1.2V to 3.3V common rails. |
| Shutdown Current | 0.01–1μA at VIN = 6V - ensures ultra-low quiescent drain in battery-off state. |
| Thermal Shutdown Threshold | 150°C with 20°C hysteresis - protects die during sustained overload or poor PCB heatsinking. |
| Peak Switch Current Limit | 3.0A per channel - provides cycle-by-cycle overcurrent protection before thermal shutdown activates. |
Pinout & Package
MP2125DL-LF-Z is housed in a thermally enhanced 14-pin QFN package (3mm × 4mm, 0.5mm pitch) with exposed thermal pad. Pin 1 is marked by a dot or notch; the exposed paddle must be soldered to PCB ground for optimal thermal performance (θJC = 12°C/W).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 FB1 | Channel 1 feedback input | Connects to resistor divider midpoint; regulates VOUT1 to 0.8V reference. |
| 2 GND1 | Channel 1 ground return | Dedicated ground path for channel 1 power loop; minimizes noise coupling to FB1. |
| 3 SW1 | Channel 1 switch node | Drives external inductor L1; requires short, low-inductance trace to reduce EMI. |
| 4 N/C | No connect | Not internally bonded; must remain unconnected on PCB. |
| 5 PVIN2 | Channel 2 power FET supply | Provides gate drive voltage to channel 2 high-side PFET; decoupled with local 10μF ceramic cap. |
| 6 VIN2 | Channel 2 controller supply | Powers channel 2 control circuitry; separate from PVIN2 to improve PSRR and transient response. |
| 7 EN2 | Channel 2 enable input | Active-high; internal 1MΩ pull-down ensures default disable; TTL- and CMOS-compatible. |
| 8 FB2 | Channel 2 feedback input | Independent regulation of VOUT2; allows asymmetric output configurations (e.g., 1.8V + 2.5V). |
| 9 GND2 | Channel 2 ground return | Dedicated ground for channel 2; isolates return currents from channel 1 to prevent crosstalk. |
| 10 SW2 | Channel 2 switch node | Drives L2; routed separately from SW1 to avoid magnetic coupling and ripple injection. |
| 11 N/C | No connect | Not internally bonded; must remain unconnected on PCB. |
| 12 PVIN1 | Channel 1 power FET supply | Gate drive supply for channel 1 PFET; requires local 10μF ceramic decoupling. |
| 13 VIN1 | Channel 1 controller supply | Powers channel 1 bias and logic; independent routing improves noise immunity vs. shared VIN. |
| 14 EN1 | Channel 1 enable input | Active-high enable with internal 1MΩ pull-down; supports independent sequencing of dual outputs. |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent enable inputs (EN1/EN2) | Enables staggered power-up, dynamic channel disabling, and system-level power sequencing control. |
| Separate PVIN/VIN pins per channel | Decouples high-current FET drive from sensitive control circuitry, improving PSRR and reducing ground bounce. |
| 100% duty-cycle operation | Maintains regulation down to VIN – VOUT ≈ 0.2V (at 1.5A), critical for Li+ battery end-of-discharge support. |
| Stable with low-ESR ceramic capacitors | Eliminates need for electrolytic or tantalum output caps; reduces board area and improves reliability. |
| Cycle-by-cycle overcurrent protection | Clamps peak inductor current at 3.0A per channel, preventing MOSFET failure during startup or overload. |
Applications
| Solid State Disk (SSD) Power Rails | Digital Camera Core Logic |
|---|---|
|
Use Scenario: Dual-rail power for NAND flash controller (1.8V) and DRAM buffer (2.5V) in embedded SSD modules. IC Role / Device Role / Timing Role: Dual synchronous buck regulator providing isolated, sequenced, low-noise DC supplies. Use Value: Independent EN1/EN2 enables controlled power-up sequence; 1.2MHz switching allows <5mm² total passive area per rail. |
Use Scenario: Powering image signal processor (ISP) core (1.2V) and I/O interface (1.8V) in compact digital cameras. IC Role / Device Role / Timing Role: Dual-channel DC/DC converter delivering tightly regulated, low-ripple supplies with minimal footprint. Use Value: 0.8V reference tolerance (±3%) ensures <±1.5% output accuracy; QFN14 package fits 8mm × 8mm camera module space. |
| Smartphone Application Processor Core | Portable Medical Instrument Sensors |
|
Use Scenario: Supplying CPU core (1.0V) and GPU subsystem (1.1V) in battery-constrained smartphone SoC designs. IC Role / Device Role / Timing Role: High-efficiency dual buck converter supporting dynamic voltage scaling (DVS) via FB-divider reconfiguration. Use Value: 92% peak efficiency at 1.5A/1.8V extends runtime; 1μA shutdown current preserves battery during sleep mode. |
Use Scenario: Powering analog front-end (2.5V) and microcontroller (3.3V) in handheld ECG or pulse oximeter devices. IC Role / Device Role / Timing Role: Dual-output regulator with low noise and tight load regulation for precision analog measurement paths. Use Value: Load regulation <±0.1% over 0–1.5A ensures ADC reference stability; thermal shutdown prevents sensor drift at elevated ambient temps. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel synchronous buck converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS62125DSCR | Single-channel 1.5A, 3–17V input, 1.2MHz, but lacks dual independent outputs and PVIN/VIN separation. | Requires two ICs for dual-rail designs; no channel enable independence or 100% duty cycle. | Select when only one regulated rail is needed or when wider input range (up to 17V) is required. |
| RT8070ZSP | Dual 1.5A, 2.7–5.5V input, 1.5MHz, but uses shared enable and lacks separate PVIN pins-higher cross-regulation. | Less suitable for asymmetric or independently sequenced rails; lower efficiency below 3V input. | Prefer for cost-sensitive, non-critical dual-rail apps where layout simplicity outweighs channel isolation needs. |
Compared with TPS62125DSCR and RT8070ZSP, MP2125DL-LF-Z uniquely delivers true dual-channel independence (separate EN, FB, PVIN/VIN), 100% duty cycle, and optimized Li+-battery operation-making it superior for space-constrained, multi-rail portable systems requiring precise sequencing and dropout resilience.
Availability
MP2125DL-LF-Z is available at Aetrix Electronics and suitable for solid-state disk power management, digital camera subsystems, and portable medical instrumentation requiring stable component supply across extended temperature ranges (–40°C to +85°C) and long-term production continuity.
Supply support for MP2125DL-LF-Z includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and power ICs, with design centers in the US, China, and Taiwan, and global manufacturing partnerships.
The MP2125 belongs to MPS's high-density DC/DC converter product line, engineered specifically for Li-ion battery-powered portable electronics demanding ultra-small footprint, dual independent regulation, and robust thermal performance in QFN packages.
FAQ
What is the maximum recommended output current per channel under continuous operation?
The MP2125DL-LF-Z supports up to 1.5A per channel continuously when ambient temperature is ≤70°C and PCB thermal design maintains junction temperature below 150°C. At full load, power dissipation reaches ~1.6W (calculated using θJA = 50°C/W), requiring adequate copper area and thermal vias under the exposed pad.
Can the two channels be configured for different output voltages?
Yes-each channel has independent feedback pins (FB1/FB2) and resistor dividers, allowing distinct output voltages (e.g., 1.2V on CH1, 2.5V on CH2). The 0.8V reference is identical for both channels, and the datasheet provides resistor tables for common settings including 1.2V, 1.8V, 2.5V, and 3.3V.
Is external compensation required for stability?
No-MP2125DL-LF-Z uses internal compensation with peak current-mode control and built-in slope compensation. It is explicitly characterized to be stable with standard 3.3μH shielded inductors and 22μF X5R/X7R ceramic output capacitors, eliminating the need for external compensation networks.
How does the device handle short-circuit conditions?
Under output short-circuit, the MP2125DL-LF-Z reduces switching frequency and lowers the peak current limit to limit fault energy. Once the short is removed and FB voltage recovers toward 0.8V, normal operation resumes automatically-no latch-off or manual reset is required.
What is the purpose of the separate PVIN and VIN pins per channel?
PVIN supplies gate drive voltage to the high-side PFET, while VIN powers the control circuitry. Separating them minimizes noise coupling from high di/dt switching events into the error amplifier and oscillator, improving PSRR, load transient response, and overall regulation accuracy-especially critical in noise-sensitive analog applications.
Does MP2125DL-LF-Z support forced PWM mode?
Yes-the device operates exclusively in forced continuous conduction mode (CCM) at fixed 1.2MHz, eliminating subharmonic oscillation and ensuring predictable EMI spectrum. This avoids the variable-frequency behavior of pulse-skipping modes, simplifying EMI filtering and improving light-load regulation stability.
MP2125DL-LF-Z Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Monolithic Power Systems Inc.
- Series:
- -
- Package/Case:
- 14-VFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Not For New Designs
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 2
- Voltage - Input (Min):
- 2.7V
- Voltage - Input (Max):
- 6V
- Voltage - Output (Min/Fixed):
- 0.8V
- Voltage - Output (Max):
- 6V
- Current - Output:
- 1.5A
- Frequency - Switching:
- 1.2MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-QFN (3x4)
MP2125DL-LF-Z FAQ
1.How can I place an order for MP2125DL-LF-Z through Aetrix?
Please submit a Request for Quotation (RFQ) for MP2125DL-LF-Z on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MP2125DL-LF-Z reliable?
The price and inventory of MP2125DL-LF-Z are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MP2125DL-LF-Z is usually 5 days.
3.What payment methods are accepted for MP2125DL-LF-Z?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MP2125DL-LF-Z transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MP2125DL-LF-Z?
MP2125DL-LF-Z orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MP2125DL-LF-Z order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MP2125DL-LF-Z?
For technical support, including MP2125DL-LF-Z datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MP2125DL-LF-Z requirements.
6.How does Aetrix verify that MP2125DL-LF-Z is sourced from the original manufacturer or authorized distributors?
All MP2125DL-LF-Z products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MP2125DL-LF-Z meets industry standards.
7.What is the process for return or replacement of MP2125DL-LF-Z?
All MP2125DL-LF-Z units undergo pre-shipment inspection (PSI). If there is an issue with MP2125DL-LF-Z, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MP2125DL-LF-Z part is unused and in its original packaging.
Return procedure for MP2125DL-LF-Z:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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