My Inquiry
My Account
Monolithic Power Systems Inc. MP2166GD-P
- Part No.:
- MP2166GD-P
- Manufacturer:
- Monolithic Power Systems Inc.
- Package:
- 18-VFQFN
- Datasheet:
-
MP2166GD-P.pdf
- Description:
- IC REG 18QFN
- Quantity:
- Payment:
- Shipping:
Inventory:3,282
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
MP2166GD-P from Monolithic Power Systems is a dual-channel, synchronous buck regulator supporting 2A/2A or 3A/1A output configurations, operating from 2.7V–6V input with 0.6V–5.5V adjustable output per channel. It integrates 55mΩ high-side and 20mΩ low-side MOSFETs, delivers 60µA quiescent current, and features power-good (PG) indicators and programmable soft-start-optimized for single-cell Li+-powered smartphones and portable instruments.
For engineers reviewing the MP2166GD-P datasheet, MP2166GD-P pinout, MP2166GD-P application, or MP2166GD-P equivalent, key selection criteria include dual-channel current configuration flexibility (2A/2A vs. 3A/1A), 180° phase-shifted operation to reduce input ripple, AAM/CCM mode control via CCM pin, and QFN-18 (2mm×3mm) thermal performance with θJA = 70°C/W.
Technical Context
The MP2166GD-P uses peak-current-mode control with internal compensation per channel, enabling fast transient response and cycle-by-cycle over-current protection. Its dual oscillators support 180° out-of-phase switching at up to 3MHz, reducing input capacitor requirements while maintaining independent soft-start and power-good signaling per channel.
It supports 100% duty-cycle dropout operation and configurable light-load behavior: forced CCM (1.6V threshold on CCM pin) for fixed-frequency low-ripple output, or advanced asynchronous mode (AAM, <0.4V on CCM) for ultra-low quiescent current during no-load conditions.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input voltage range | 2.7V–6V - compatible with single-cell Li+ battery systems (3.0V–4.2V nominal) without external LDO pre-regulation. |
| Output current capability | Configurable as dual 2A channels or asymmetric 3A/1A - enables flexible power rail partitioning for SoC + peripheral supply. |
| RDS(ON) (HS/LD) | 55mΩ / 20mΩ - enables >90% peak efficiency at 1.2V/2A with minimal thermal derating in QFN-18 (2mm×3mm). |
| Quiescent current | 60µA - extends battery runtime in always-on subsystems (e.g., RTC, sensor hub) without compromising startup speed. |
| Switching frequency | Up to 3MHz (programmable via FREQ resistor or external sync clock) - allows use of sub-2.2µH inductors for ultra-compact PCB layouts. |
| Soft-start time | ~0.5ms (internal); programmable via external SS capacitor - prevents inrush current and output overshoot during cold boot. |
| Power-good accuracy | ±5% window (0.82–0.95×VFB) - ensures reliable system reset sequencing before processor or PMIC initialization. |
Pinout & Package
MP2166GD-P is housed in a thermally enhanced QFN-18 package (2mm × 3mm, 0.5mm pitch) with exposed thermal pad. The package supports JEDEC MO-220 standard footprint and requires PCB copper pour connected to PGND pins for optimal thermal dissipation (θJA = 70°C/W on 4-layer board).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 13 PGND1 / PGND2 | Power ground (channel 1 & 2) | Separate low-impedance return paths for each buck stage; must connect to large copper areas near respective input/output capacitors. |
| 2, 12 SW1 / SW2 | Switch node (channel 1 & 2) | High dv/dt nodes connecting internal HS/LD MOSFETs to external inductors; require short, wide traces away from sensitive analog routing. |
| 3, 11 VIN1 / VIN2 | Input supply (channel 1 & 2) | Independent inputs allow split-rail sourcing (e.g., separate battery and USB VBUS); each requires local 22µF ceramic decoupling. |
| 4, 10 SS1 / SS2 | Soft-start control (channel 1 & 2) | Capacitor-programmable ramp rate; enables staggered startup to limit inrush when both channels power up simultaneously. |
| 5, 9 FB1 / FB2 | Feedback input (channel 1 & 2) | 0.6V reference comparator inputs; set output voltage via resistive divider (e.g., 100kΩ/49.9kΩ for 1.8V). |
| 6 AGND | Analog ground | Reference ground for error amplifiers and internal regulators; must be externally tied to PGND at single point near VCC decoupling. |
| 7 VCC | Internal bias supply | Regulated internal rail powering control logic; requires 0.1–1µF ceramic capacitor to AGND placed adjacent to pin. |
| 8 CCM | Mode control | Digital input selecting forced CCM (>1.6V) for constant frequency or AAM (<0.4V) for highest light-load efficiency. |
| 14, 18 PG1 / PG2 | Power-good open-drain outputs | Active-low status flags indicating regulation stability; require external pull-up (e.g., 100kΩ to VIN or VCC) for system sequencing. |
| 15, 17 EN1 / EN2 | Enable inputs | Logic-level controls (1.6V high threshold) allowing independent channel enable/disable for dynamic power management. |
| 16 FREQ | Frequency programming/sync | Resistor-to-GND sets oscillator (298–3300kHz); also accepts external 350kHz–3MHz sync clock for EMI reduction. |
Key Features
| Feature | Design Value |
|---|---|
| 180° phase-shifted dual-channel operation | Reduces input RMS current by ~30%, enabling smaller input bulk capacitors (e.g., single 22µF instead of two 10µF). |
| Programmable AAM/CCM mode | Enables >90% efficiency at 1mA load (AAM) while retaining <20mVpp ripple at full load (CCM), eliminating need for external mode control logic. |
| Integrated 55mΩ/20mΩ MOSFETs | Eliminates external Schottky diodes and gate drivers, reducing BOM count by ≥4 components and PCB area by >15mm². |
| Independent soft-start and PG per channel | Supports staggered power-up sequences (e.g., core rail before I/O rail) and independent fault detection for multi-rail SoC applications. |
| 100% duty-cycle dropout capability | Maintains regulation down to VIN – VOUT ≈ 100mV (at 2A), extending usable battery range below 3.0V without brownout resets. |
Applications
| Smartphone Core/IO Rails | Wearable Sensor Hub |
|---|---|
|
Use Scenario: Dual-rail power for application processor (1.8V/2A) and I/O peripherals (1.2V/1A) in compact smartphone PCBs. IC Role / Device Role / Timing Role: Synchronous buck regulator providing tightly regulated, low-noise DC supplies with independent enable and PG signaling. Use Value: 180° phase shift cuts input ripple by 40%, allowing smaller 22µF input caps; 60µA IQ extends standby time beyond 72 hours. |
Use Scenario: Ultra-low-power dual supply for optical heart-rate sensor (3.3V/1A) and BLE radio (1.2V/2A) in fitness bands. IC Role / Device Role / Timing Role: Dual-channel DC-DC converter with AAM mode enabling <1µA system sleep current when sensors are inactive. Use Value: AAM mode reduces no-load power to 1.5µW; integrated PG signals ensure safe wake-up only after both rails stabilize. |
| Portable Medical Monitor | Industrial Handheld Terminal |
|
Use Scenario: Powering ADC front-end (5V/0.5A) and microcontroller (3.3V/1.5A) in battery-operated ECG devices requiring clinical-grade stability. IC Role / Device Role / Timing Role: Precision dual buck regulator with ±1% output accuracy and hiccup-mode short-circuit protection for patient safety compliance. Use Value: Cycle-by-cycle OCP and thermal shutdown meet IEC 60601-1 leakage current limits; 0.6V FB reference enables accurate low-voltage sensing rails. |
Use Scenario: Ruggedized dual supply for display driver (5V/1A) and ARM Cortex-M7 (1.2V/2A) in warehouse scanners operating across -20°C to +70°C ambient. IC Role / Device Role / Timing Role: Industrial-grade buck controller with -40°C to +125°C junction rating and 175°C thermal shutdown threshold. Use Value: QFN-18 (2mm×3mm) package with θJC = 15°C/W enables passive cooling in sealed enclosures; 100% duty cycle sustains operation down to 2.8V battery voltage. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel synchronous buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| RTQ2132B-QT | Higher 6V max input, 3A/3A fixed output, no SS/PG per channel, 120µA IQ | Lacks independent soft-start and power-good per channel; better suited for non-sequenced dual-rail systems | Select when higher current symmetry and automotive AEC-Q100 qualification are required over sequencing flexibility. |
| TPS65218D0RSLR | PMIC with LDOs, battery charger, and fuel gauge; 2A/2A bucks at 2.7–5.5V; 80µA IQ | Integrated power management suite adds complexity but reduces total BOM count for complete system power | Select when combining buck regulation with charging, monitoring, and LDOs justifies added cost and footprint. |
Compared with RTQ2132B-QT and TPS65218D0RSLR, the MP2166GD-P uniquely balances per-channel sequencing control, ultra-low IQ, and compact QFN-18 packaging-making it optimal for space-constrained, battery-sensitive dual-rail designs where discrete control and minimal standby loss are critical.
Availability
MP2166GD-P is available at Aetrix Electronics and suitable for smartphone power management, wearable sensor hubs, portable medical monitors, and industrial handheld terminals requiring stable component supply across extended temperature and lifecycle demands.
Supply support for MP2166GD-P includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and power ICs, with over 20 years of expertise in DC-DC conversion and power management solutions.
The MP2166 product line targets ultra-compact, battery-powered applications demanding high efficiency at light loads and precise multi-rail sequencing-designed specifically for next-generation mobile and portable electronics.
FAQ
What is the maximum supported switching frequency and how is it set?
The MP2166GD-P supports up to 3MHz switching frequency, set either by an external resistor (RFREQ) from FREQ pin to GND or by synchronizing to an external clock (350kHz–3MHz). At RFREQ = 51kΩ, typical frequency is 3MHz; at 200kΩ, it drops to 1MHz. External sync preserves 180° phase shift between channels.
How does the CCM pin affect efficiency and ripple performance?
Pulling CCM >1.6V forces continuous conduction mode (CCM), delivering fixed-frequency operation with <20mVpp output ripple at full load but higher 50µA shutdown current. Pulling CCM <0.4V enables advanced asynchronous mode (AAM), reducing no-load IQ to 1.5µA while increasing ripple-ideal for battery longevity in intermittent-use devices.
Can MP2166GD-P operate with only one channel enabled?
Yes. EN1 and EN2 are independent logic inputs; disabling one channel (ENx = 0V) shuts down its power stage and associated PG output while the other channel continues normal operation. No cross-talk or efficiency penalty occurs-enabling dynamic rail shutdown in multi-mode systems.
What thermal design practices are recommended for QFN-18 (2mm×3mm) layout?
Connect the exposed thermal pad directly to a solid PGND plane on the top layer, then use ≥4 thermal vias (0.3mm diameter) to inner ground planes. Maintain ≥0.2mm clearance between SW traces and FB routing. Follow MPS-recommended 4-layer stackup with dedicated PGND and AGND planes to achieve θJA ≤70°C/W.
Does MP2166GD-P support output voltages below 0.6V?
No. The internal reference is fixed at 0.6V ±1.2% (0.588V–0.612V), and FB pins compare against this reference. Output voltage is calculated as VOUT = 0.6V × (1 + R1/R2). Minimum practical output is 0.6V; lower voltages require external reference injection or post-regulation, which voids guaranteed specs.
How does the hiccup-mode short-circuit protection work?
Upon sustained over-current (>4.5A per channel), the MP2166GD-P disables switching, discharges the SS capacitor, and attempts automatic restart after ~10ms. If short persists, it repeats hiccup cycles (on-time ~100µs, off-time ~10ms) until fault clears-limiting average power dissipation to <150mW and preventing thermal runaway.
Is there a difference between MP2166GD and MP2166GD-P?
MP2166GD-P is the tape-and-reel packaged version of MP2166GD (suffix "-P" denotes packaging variant per MPS ordering nomenclature). Electrical, thermal, and functional specifications are identical; only reel quantity and moisture sensitivity level (MSL3) differ for manufacturing handling.
MP2166GD-P Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Monolithic Power Systems Inc.
- Series:
- *
- Package/Case:
- 18-VFQFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- -
- Output Configuration:
- -
- Topology:
- -
- Output Type:
- -
- Number of Outputs:
- -
- Voltage - Input (Min):
- -
- Voltage - Input (Max):
- -
- Voltage - Output (Min/Fixed):
- -
- Voltage - Output (Max):
- -
- Current - Output:
- -
- Frequency - Switching:
- -
- Synchronous Rectifier:
- -
- Operating Temperature:
- -
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 18-QFN (2x3)
MP2166GD-P FAQ
1.How can I place an order for MP2166GD-P through Aetrix?
Please submit a Request for Quotation (RFQ) for MP2166GD-P on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MP2166GD-P reliable?
The price and inventory of MP2166GD-P are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MP2166GD-P is usually 5 days.
3.What payment methods are accepted for MP2166GD-P?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MP2166GD-P transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MP2166GD-P?
MP2166GD-P orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MP2166GD-P order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MP2166GD-P?
For technical support, including MP2166GD-P datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MP2166GD-P requirements.
6.How does Aetrix verify that MP2166GD-P is sourced from the original manufacturer or authorized distributors?
All MP2166GD-P products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MP2166GD-P meets industry standards.
7.What is the process for return or replacement of MP2166GD-P?
All MP2166GD-P units undergo pre-shipment inspection (PSI). If there is an issue with MP2166GD-P, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MP2166GD-P part is unused and in its original packaging.
Return procedure for MP2166GD-P:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
MP2166GD-P Tags
-
TPS562201DDCR
Texas Instruments
-
MC34063ABD-TR
STMicroelectronics
-
TPS561201DDCR
Texas Instruments
-
MC33063ADR
Texas Instruments
-
MC34063ADR
Texas Instruments
-
TPS560200DBVR
Texas Instruments
-
AP3012KTR-G1
Diodes Incorporated
-
TLV61048DBVR
Texas Instruments
-
AZ34063UMTR-G1
Diodes Incorporated
-
TPS562200DDCR
Texas Instruments
-
AP62300TWU-7
Diodes Incorporated
-
MC34063EBD-TR
STMicroelectronics
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
