Monolithic Power Systems Inc. MP2263GD-P
- Part No.:
- MP2263GD-P
- Manufacturer:
- Monolithic Power Systems Inc.
- Package:
- 15-PowerVFQFN
- Datasheet:
-
MP2263GD-P.pdf
- Description:
- IC REG BUCK PROG 3A 15QFN
- Quantity:
- Payment:

- Shipping:

Inventory:1,027
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Product details
Overview
MP2263GD-P from Monolithic Power Systems is a synchronous step-down DC-DC converter with integrated high-side (90mΩ) and low-side (38mΩ) MOSFETs, delivering 3A continuous output current across a 3.3V–30V input range. It features programmable switching frequency (350kHz–2.5MHz), 12µA sleep-mode quiescent current, external soft-start control, and open-drain power-good signaling - enabling robust, efficient power conversion in space-constrained battery-powered and wide-input industrial systems.
For engineers reviewing the MP2263GD-P datasheet, MP2263GD-P pinout, MP2263GD-P application, or MP2263GD-P equivalent, key selection considerations include its QFN-15 (2mm×3mm) package footprint, MODE-selectable PFM/PWM operation, 80ns minimum on-time for high-duty-cycle regulation, hiccup-mode over-current protection, and bias-supply flexibility (BIAS-to-GND or BIAS-to-VOUT).
Technical Context
The MP2263GD-P employs current-mode control with cycle-by-cycle peak current limiting and advanced asynchronous mode (AAM) for light-load efficiency optimization. Its internal error amplifier compares FB voltage against a precise 0.8V reference and drives VCOMP to regulate output via PWM or PFM based on MODE pin state.
It integrates dual LDO regulators: LDO1 powered from VIN (5V output when VIN > 5V), and LDO2 powered from BIAS (enabled when VBIAS > 4.8V). Bootstrap charging uses an internal PMOS regulator tied to VCC, supporting high-duty-cycle operation down to ~100% duty with BST–SW UVLO recovery.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 3.3V to 30V - supports direct connection to 12V/24V rails and wide-range battery inputs (e.g., 3S–8S Li-ion). |
| Output Current | 3A continuous - sufficient for powering microcontrollers, sensors, and communication ICs without external current boosting. |
| Quiescent Current | 12µA in sleep mode - enables multi-year operation in always-on IoT nodes with coin-cell or energy-harvesting sources. |
| Switching Frequency | 350kHz to 2.5MHz (resistor-programmable) - allows trade-off between EMI performance and component size (e.g., smaller inductors at higher frequencies). |
| RDS(ON) | 90mΩ (HS) / 38mΩ (LS) - minimizes conduction loss and thermal rise at full load, supporting >92% peak efficiency at 12V→3.3V/3A. |
| Power Good Threshold | UV: 84–95% of 0.8V; OV: 110–123% of 0.8V - provides reliable system-level power sequencing and fault detection with 34µs/57µs deglitch timing. |
| Minimum On-Time | 80ns - enables stable regulation at high input-to-output voltage ratios (e.g., 30V→3.3V) without pulse-skipping instability. |
Pinout & Package
MP2263GD-P is housed in a thermally enhanced QFN-15 package measuring 2mm × 3mm with exposed thermal pad (pin 3/8 PGND connected to pad). The package supports high-density PCB layouts and efficient heat dissipation via bottom-side copper thermal vias.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 MODE | Mode selection control | Pull low or float for auto PFM/PWM; pull high to VCC for forced PWM - determines light-load efficiency vs. EMI behavior. |
| 2 VIN | Main input supply | Accepts 3.3V–30V; powers internal circuitry and high-side switch - requires local 10µF ceramic decoupling. |
| 3, 8 PGND | Power ground return | Low-impedance path for high-current switch node return - must be tied directly to thermal pad and input/output capacitor grounds. |
| 4 EN | Enable/disable control | Digital logic input (0.9–1.2V threshold); pulls internal circuitry into 1µA shutdown when low - supports system-level power gating. |
| 5 NC | No connection | Internally unconnected - must remain floating; no routing or soldering allowed. |
| 6 PG | Open-drain power-good indicator | Signals valid output (UV/OV fault detection) - requires external 100kΩ pull-up to VCC for proper logic level translation. |
| 7 BIAS | Bias supply input | Optional external bias source (>4.8V) to power internal LDO2 - improves efficiency in 5V-output applications when tied to VOUT. |
| 9 SW | Switch node | Drives external inductor - high di/dt node requiring minimized loop area and tight coupling to PGND/VIN capacitors. |
| 10 BST | Bootstrap supply | Charges internal high-side gate driver - requires 0.1µF ceramic capacitor between BST and SW, placed adjacent to IC. |
| 11 VCC | Internal LDO output | 5V regulated supply for control circuitry - requires 1µF ceramic decoupling to PGND near pin. |
| 12 AGND | Analog ground reference | Reference for FB, SS, and error amplifier - must be star-connected to PGND at single point to avoid noise coupling. |
| 13 SS | Soft-start timing input | 10µA current source charges external capacitor - sets monotonic output ramp time and prevents inrush current during startup. |
| 14 FB | Feedback voltage sense | Monitors output via resistor divider - 0.8V internal reference enables precise output setting (e.g., 3.3V with 1MΩ/324kΩ divider). |
| 15 FREQ | Frequency programming | Resistor-to-ground sets switching frequency - e.g., 82kΩ yields ~1MHz, balancing EMI, efficiency, and inductor size. |
Key Features
| Feature | Design Value |
|---|---|
| Wide input voltage range | 3.3V–30V operation eliminates need for pre-regulators in automotive, industrial, and battery-powered systems with variable input sources. |
| Integrated power MOSFETs | 90mΩ HS / 38mΩ LS RDS(ON) reduces BOM count and layout complexity while maintaining >90% efficiency across 0.1A–3A load range. |
| External soft-start control | Capacitor-programmable start-up ramp prevents output overshoot and inrush stress on downstream loads and input capacitors. |
| Power good (PG) output | Open-drain PG with UV/OV detection enables safe power sequencing and fault reporting in multi-rail systems without external comparators. |
| Hiccup-mode over-current protection | Auto-retry shutdown on short-circuit conditions protects IC and PCB traces while allowing automatic recovery after fault removal. |
| Low-dropout high-duty-cycle mode | Supports >95% duty cycle with BST refresh logic - maintains regulation even when input drops close to output (e.g., 3.6V→3.3V). |
Applications
| Smart Home Sensors | Industrial PLC I/O Modules |
|---|---|
|
Use Scenario: Long-life battery-powered occupancy/motion sensors with BLE/Wi-Fi connectivity and ultra-low standby current. IC Role / Device Role / Timing Role: Primary 3.3V system rail regulator, managing deep-sleep wake-up cycles and burst transmission power demands. Use Value: 12µA sleep IQ and 1µA shutdown current extend CR2032 battery life beyond 5 years; 80ns min-on-time ensures stable 3.3V output from depleting 2S Li-ion (4.2V→3.0V). |
Use Scenario: DIN-rail mounted programmable logic controller with isolated 24V DC input powering digital I/O, analog front-end, and MCU subsystems. IC Role / Device Role / Timing Role: Secondary 3.3V/5V point-of-load regulator for microcontroller and interface ICs, operating from unregulated 24V bus. Use Value: 30V absolute max input rating tolerates 24V transients and surges; hiccup OCP prevents latch-up during field-wiring faults; QFN-15 footprint saves board space in dense I/O modules. |
| Portable Medical Devices | Automotive Body Control Units |
|
Use Scenario: Handheld glucose meters and pulse oximeters using single-cell Li-ion (3.0V–4.2V) with strict EMC and reliability requirements. IC Role / Device Role / Timing Role: Efficient 3.3V supply for sensor signal chain and display driver, with soft-start preventing measurement offset during power-on. Use Value: External soft-start capacitor ensures monotonic VOUT ramp; 0.8V FB reference enables accurate output setting; RoHS/halogen-free compliance meets medical safety standards. |
Use Scenario: 12V vehicle electrical system powering LED lighting controls, window lift ECUs, and door module MCUs with cold-crank tolerance. IC Role / Device Role / Timing Role: Step-down regulator converting battery rail to stable 3.3V for CAN transceivers and microcontrollers during cranking (down to 3.3V input). Use Value: 3.3V UVLO threshold and low-dropout mode sustain operation during 6V cold-crank events; thermal shutdown protects against under-hood temperature excursions. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous step-down converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MP2238DJ-LF-Z | 2A output, 4.5V–36V input, 25µA IQ, QFN-12 (3mm×3mm) | Larger package, lower current rating, higher quiescent current - suitable only for <2A loads where board area is less constrained. | Select when cost sensitivity outweighs size and efficiency needs, and 2A output suffices. |
| TPS54331DR | 3A output, 3.5V–28V input, 26µA IQ, SOIC-8 package | Through-hole SOIC-8 footprint, no PG output, no external soft-start, fixed 570kHz frequency - lacks critical features for compact, sequenced, or battery-optimized designs. | Choose only for legacy SOIC-based designs where PG, soft-start, and package size are non-critical. |
Compared with MP2263GD-P, MP2238DJ-LF-Z trades current capability and efficiency for lower cost and simpler layout, while TPS54331DR sacrifices feature set and thermal performance for compatibility with older SOIC footprints - neither matches the MP2263GD-P's combination of 3A output, 12µA IQ, PG, soft-start, and 2×3mm QFN in a single device.
Availability
MP2263GD-P is available at Aetrix Electronics and suitable for smart home sensor nodes, industrial PLC I/O modules, and portable medical devices requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for MP2263GD-P includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and power ICs, with design centers in the US, China, and Taiwan, and global manufacturing partnerships.
The MP2263GD-P belongs to MPS's wide-input, low-IQ synchronous buck converter product line, engineered specifically for battery longevity, high-density power delivery, and robust operation in automotive, industrial, and IoT edge applications.
FAQ
What is the recommended input capacitor configuration for MP2263GD-P?
Use two 10µF X5R/X7R ceramic capacitors placed as close as possible to VIN and PGND pins. One capacitor should be rated for ≥1.5× the maximum RMS input current (≈1.5A at 3A load), and a 0.1µF ceramic capacitor must be added adjacent to the IC for high-frequency decoupling. This configuration suppresses switching noise and maintains stable input voltage under transient load steps.
Can MP2263GD-P operate with pre-biased outputs?
Yes - MP2263GD-P supports monotonic pre-bias start-up. When the output is already biased, the internal soft-start capacitor and BST capacitor are charged simultaneously. Operation begins only after both the soft-start voltage exceeds 1.125×VFB + Voffset and BST voltage crosses its rising threshold, preventing reverse current flow and ensuring controlled ramp-up without output collapse.
How does the MODE pin affect efficiency and EMI performance?
When MODE is pulled low or left floating, MP2263GD-P operates in auto PFM/PWM mode: it switches to discontinuous conduction mode (DCM) at light loads to reduce switching losses and achieve <15µA total input current. When MODE is pulled high to VCC, it forces continuous PWM mode - improving EMI predictability and load-transient response but increasing light-load IQ to ~35µA.
What is the function of the BIAS pin, and when should it be used?
The BIAS pin supplies an alternative power source for the internal LDO2 regulator. When connected to a stable ≥4.8V source (e.g., VOUT in 5V applications), BIAS disables LDO1 and powers internal circuitry more efficiently - reducing power loss and improving overall converter efficiency by up to 2% at medium loads. If unused, BIAS must be tied to PGND.
Is thermal derating required for continuous 3A operation in a QFN-15 package?
Yes - at ambient temperatures above +60°C or with limited PCB copper area, thermal derating is necessary. With standard 4-layer board (2oz Cu, 2cm² thermal pad vias), MP2263GD-P delivers full 3A up to +85°C ambient. Above that, output current must be reduced per θJA = 70°C/W; for example, at +100°C ambient, max continuous current drops to ~2.2A to maintain TJ ≤ 125°C.
How is the power-good (PG) signal configured for undervoltage detection?
PG asserts high when VFB rises above 90% of 0.8V (0.72V) and remains high until VFB falls below 84% (0.672V), with 34µs deglitch filtering. To use this, connect a 100kΩ pull-up resistor from PG to VCC. The open-drain output can drive microcontroller GPIOs or enable downstream regulators, providing reliable system-level power validation without external components.
What is the minimum recommended inductor value for 12V→3.3V/3A operation?
For 12V→3.3V at 500kHz, the recommended inductor is 4.7µH with ≥3.8A saturation current and ≤15mΩ DCR. This value balances ripple current (~30% of 3A = 0.9A), efficiency, and transient response. Lower values increase ripple and core loss; higher values improve ripple suppression but degrade load-step response and require larger physical size.
MP2263GD-P Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Monolithic Power Systems Inc.
- Series:
- -
- Package/Case:
- 15-PowerVFQFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Programmable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 3.3V
- Voltage - Input (Max):
- 30V
- Voltage - Output (Min/Fixed):
- 1.05V
- Voltage - Output (Max):
- 5V
- Current - Output:
- 3A
- Frequency - Switching:
- 2.5MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 15-QFN (3x2)
MP2263GD-P FAQ
1.How can I place an order for MP2263GD-P through Aetrix?
Please submit a Request for Quotation (RFQ) for MP2263GD-P on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MP2263GD-P reliable?
The price and inventory of MP2263GD-P are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MP2263GD-P is usually 5 days.
3.What payment methods are accepted for MP2263GD-P?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MP2263GD-P transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MP2263GD-P?
MP2263GD-P orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MP2263GD-P order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MP2263GD-P?
For technical support, including MP2263GD-P datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MP2263GD-P requirements.
6.How does Aetrix verify that MP2263GD-P is sourced from the original manufacturer or authorized distributors?
All MP2263GD-P products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MP2263GD-P meets industry standards.
7.What is the process for return or replacement of MP2263GD-P?
All MP2263GD-P units undergo pre-shipment inspection (PSI). If there is an issue with MP2263GD-P, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MP2263GD-P part is unused and in its original packaging.
Return procedure for MP2263GD-P:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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