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Monolithic Power Systems Inc. MP28115DQ-LF-Z
- Part No.:
- MP28115DQ-LF-Z
- Manufacturer:
- Monolithic Power Systems Inc.
- Package:
- 10-VFDFN Exposed Pad
- Datasheet:
-
MP28115DQ-LF-Z.pdf
- Description:
- IC REG BUCK ADJ 4A 10QFN
- Quantity:
- Payment:
- Shipping:
Inventory:3,964
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Product details
Overview
MP28115DQ-LF-Z from Monolithic Power Systems is a 4A, 1.5MHz synchronous step-down DC/DC converter with internal 60mΩ high- and low-side MOSFETs, adjustable 0.8V–0.9×VIN output, ±1.5% FB reference accuracy, and integrated soft-start, power-good (POK), and frequency synchronization. It operates from 2.7V–6V input and targets point-of-load regulation for FPGA I/O rails and embedded microprocessor supplies.
For engineers reviewing the MP28115DQ-LF-Z datasheet, MP28115DQ-LF-Z pinout, MP28115DQ-LF-Z application, or MP28115DQ-LF-Z equivalent, this page delivers verified electrical parameters, validated QFN10 pin functions, real-world load transient behavior, thermal shutdown thresholds, and direct alternatives with documented current-limit and sync-frequency differences.
Technical Context
The MP28115DQ-LF-Z implements peak-current-mode PWM control with internal Type II compensation, eliminating external loop components while supporting bandwidth tuning via FB divider resistor selection. Its 120µs internal soft-start prevents inrush current, and pre-bias startup disables switching until soft-start voltage exceeds sensed FB voltage.
It features dual-function EN/SYNC pin enabling both enable/disable control (1.6V/0.4V thresholds) and external clock synchronization (1–2MHz range), with hiccup-mode short-circuit protection triggered when VOUT drops below 70% of nominal. The POK output provides ±10% output voltage monitoring with 30µs deglitch timing.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Current | 4A continuous - supports full-load operation for ASIC/FPGA core and I/O rails without thermal derating at +85°C ambient. |
| Input Voltage Range | 2.7V to 6V - compatible with single-cell Li-ion, USB PD, and 3.3V/5V intermediate bus architectures. |
| Feedback Accuracy | ±1.5% at +25°C, ±2% over –40°C to +85°C - ensures tight output regulation for sensitive digital supply domains. |
| Switching Frequency | 1.5MHz fixed (±20%) - enables compact 0.47–1µH inductor selection and reduces EMI filter size. |
| High-Side RDS(on) | 60mΩ - minimizes conduction loss at 4A, contributing to >95% peak efficiency at 5V→1.8V conversion. |
| Thermal Shutdown | 150°C with 20°C hysteresis - protects against sustained overload or poor PCB heatsinking in enclosed industrial enclosures. |
| Power Good Threshold | ±10% output window with 30µs deglitch - provides reliable system-level power sequencing and fault detection without external comparators. |
Pinout & Package
MP28115DQ-LF-Z uses a thermally enhanced 3mm × 3mm, 10-lead QFN package with exposed thermal pad on underside. Package meets JEDEC MO-229 VEED-5 standard and supports reflow soldering per IPC/JEDEC J-STD-020.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 FB | Feedback Input | Connects to resistive divider; regulates output by comparing to internal 0.8V reference - sets VOUT = 0.8V × (1 + R1/R2). |
| 2, 9 GND | Ground Reference | Dual ground pins reduce return path impedance; must connect to large copper pour tied to input/output capacitor negatives. |
| 3, 8 SW | Switch Node | Drives external inductor; connects internally to both MOSFETs - all SW pins must be shorted externally with low-inductance trace. |
| 4, 7 IN | Input Supply | Accepts 2.7–6V; requires local ceramic decoupling (e.g., 2×10µF X5R) adjacent to pins to suppress switching noise. |
| 5 BS | Bootstrap Supply | Connects to SW via 0.1µF ceramic capacitor; powers high-side gate driver - critical for stable 100% duty-cycle capability. |
| 6 POK | Open-Drain Power Good | Active-low indicator pulled low if VOUT deviates >±10%; requires external pull-up for system reset or enable sequencing. |
| 10 EN/SYNC | Enable & Sync Input | Logic-level enable (0.4V/1.6V thresholds) or 1–2MHz external clock input - synchronizes switching to avoid beat frequencies in multi-rail systems. |
Key Features
| Feature | Design Value |
|---|---|
| All-ceramic capacitor design | Eliminates need for electrolytic output capacitors - improves reliability, lifetime, and temperature stability in space-constrained designs. |
| Internal soft-start (120µs) | Prevents output overshoot and inrush current during power-up - avoids triggering upstream current limiters or brown-out detectors. |
| Hiccup-mode short-circuit protection | Shuts down and auto-restarts only after fault removal - maintains safe junction temperature during sustained output shorts without latch-off. |
| 1.5MHz fixed-frequency operation | Enables use of sub-1µH shielded inductors - reduces solution footprint by >30% versus 500kHz converters with same output current. |
| Integrated 60mΩ MOSFETs | Removes need for external power switches and Schottky diode - cuts BOM count by 3–5 components and simplifies layout. |
Applications
| FPGA I/O Supply | ASIC Core Rail |
|---|---|
|
Use Scenario: Providing stable 1.8V/4A to Xilinx Artix-7 FPGA banks with fast load transients up to 3A/µs. IC Role / Device Role / Timing Role: Primary synchronous buck regulator delivering regulated I/O voltage with POK signaling for configuration sequencer handshaking. Use Value: 120µs soft-start prevents configuration failure; ±10% POK window ensures FPGA remains in reset until rail is fully settled. |
Use Scenario: Generating 1.2V/3.5A for ARM Cortex-A53 SoC core domain in industrial gateway with ambient up to +85°C. IC Role / Device Role / Timing Role: High-efficiency point-of-load converter with thermal shutdown protecting SoC from overheating during burst processing. Use Value: 60mΩ RDS(on) limits power loss to <250mW at full load, enabling operation without forced air cooling. |
| Network Switch PHY Supply | Industrial LCD Controller Rail |
|
Use Scenario: Powering Marvell 88E6352 Gigabit Ethernet PHY requiring clean 3.3V/2.5A with <10mV ripple under dynamic link training. IC Role / Device Role / Timing Role: Secondary buck stage deriving 3.3V from 5V intermediate bus; synchronized to system clock via EN/SYNC pin. Use Value: 1.5MHz switching moves noise above sensitive 100MHz PHY analog front-end, easing EMI filtering requirements. |
Use Scenario: Supplying 5V/2A to display timing controller (TCON) in medical-grade 10.1" LCD panel with strict startup timing. IC Role / Device Role / Timing Role: Main backlight and logic rail converter with POK used to gate TCON enable signal after 120µs soft-start completes. Use Value: Internal compensation eliminates loop tuning effort - achieves >60° phase margin across 0–4A load with standard 47µF ceramic output cap. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous step-down converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| RT6220AGQW | 3A rated, 600kHz switching, external compensation required - higher RDS(on) (100mΩ HS/120mΩ LS). | Limited to ≤3A loads; lower frequency demands larger inductor and increases output ripple at same capacitance. | Select when cost sensitivity outweighs size/efficiency needs and design team has loop compensation expertise. |
| TPS544B25RTER | 4A, 1.5MHz, PMBus interface, 0.6V reference, but requires external MOSFETs and compensation network. | Supports digital telemetry and dynamic voltage scaling - adds complexity and board area vs. MP28115's integrated solution. | Select when system-level power management (VID, margining, fault logging) is required beyond basic regulation. |
Compared with RT6220AGQW and TPS544B25RTER, MP28115DQ-LF-Z delivers highest integration density and lowest component count for fixed-frequency 4A PoL applications, trading programmability and telemetry for minimal footprint and guaranteed stability out-of-box.
Availability
MP28115DQ-LF-Z is available at Aetrix Electronics and suitable for FPGA I/O supplies, ASIC core rails, network switch PHYs, and industrial LCD controller designs requiring stable component supply, RoHS-compliant packaging, and long-term production continuity.
Supply support for MP28115DQ-LF-Z includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and power ICs, with over two decades of leadership in DC/DC conversion, motor drivers, and LED lighting controllers.
The MP28115 belongs to MPS's high-density synchronous buck regulator product line, designed specifically for space-constrained, high-current point-of-load applications in computing, networking, and industrial embedded systems where thermal performance and layout simplicity are critical.
FAQ
What is the minimum recommended output capacitance for stable operation?
The MP28115DQ-LF-Z requires ≥47µF of total ceramic output capacitance (X5R/X7R dielectric) for stable regulation across 0–4A load steps. This value ensures sufficient energy storage to limit output voltage deviation to <2% during 4A transient steps and maintains phase margin >60° with internal compensation.
Can the MP28115DQ-LF-Z operate with an input voltage below 2.7V?
No. The absolute minimum input voltage is 2.7V per datasheet specifications. Below this threshold, the internal UVLO circuit disables switching - VIN undervoltage lockout rising edge is 2.69V typical, with 210mV hysteresis. Operation below 2.7V risks unregulated output or intermittent dropout.
Is an external Schottky diode required for 4A operation?
An external Schottky diode is not required due to the integrated synchronous rectifier, but it is recommended for >2A loads to minimize negative voltage spikes at the SW node and improve efficiency by ~0.5–1% under heavy continuous load. Diode reverse voltage rating must exceed maximum VIN (6V).
How does the EN/SYNC pin behave during external clock synchronization?
When a 1–2MHz square wave is applied to EN/SYNC, the MP28115 locks its oscillator to that frequency within one cycle. If any ON or OFF period exceeds 4µs, the part interprets it as an enable command instead - so clock duty cycle must stay within 10–90% to maintain synchronization without unintended shutdown.
What is the thermal resistance (θJA) under standard JEDEC test conditions?
The specified θJA is 50°C/W, measured on a 1-inch square, 1-oz copper PCB per JESD51-7. Actual board-level θJA will vary based on copper area, layer count, and thermal vias to the exposed pad - using ≥6 thermal vias under the pad typically reduces θJA to ~35°C/W in 4-layer designs.
Does the MP28115DQ-LF-Z support pre-biased output startup?
Yes. During pre-bias startup, the MP28115 disables both high- and low-side switches until the internal soft-start capacitor voltage exceeds the FB pin voltage. This prevents reverse current flow into a pre-charged output, avoiding potential damage to downstream circuitry or instability.
What is the maximum allowable bootstrap capacitor value between BS and SW pins?
The recommended bootstrap capacitor is 0.1µF ceramic (X5R/X7R). Values larger than 0.22µF may cause excessive gate drive current and prolonged high-side turn-on time, risking shoot-through during dead-time transitions - 0.1µF provides optimal charge retention and transient response.
MP28115DQ-LF-Z Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Monolithic Power Systems Inc.
- Series:
- -
- Package/Case:
- 10-VFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Not For New Designs
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 2.7V
- Voltage - Input (Max):
- 6V
- Voltage - Output (Min/Fixed):
- 0.8V
- Voltage - Output (Max):
- 5.4V
- Current - Output:
- 4A
- Frequency - Switching:
- 1.5MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-QFN (3x3)
MP28115DQ-LF-Z FAQ
1.How can I place an order for MP28115DQ-LF-Z through Aetrix?
Please submit a Request for Quotation (RFQ) for MP28115DQ-LF-Z on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MP28115DQ-LF-Z reliable?
The price and inventory of MP28115DQ-LF-Z are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MP28115DQ-LF-Z is usually 5 days.
3.What payment methods are accepted for MP28115DQ-LF-Z?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MP28115DQ-LF-Z transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MP28115DQ-LF-Z?
MP28115DQ-LF-Z orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MP28115DQ-LF-Z order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MP28115DQ-LF-Z?
For technical support, including MP28115DQ-LF-Z datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MP28115DQ-LF-Z requirements.
6.How does Aetrix verify that MP28115DQ-LF-Z is sourced from the original manufacturer or authorized distributors?
All MP28115DQ-LF-Z products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MP28115DQ-LF-Z meets industry standards.
7.What is the process for return or replacement of MP28115DQ-LF-Z?
All MP28115DQ-LF-Z units undergo pre-shipment inspection (PSI). If there is an issue with MP28115DQ-LF-Z, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MP28115DQ-LF-Z part is unused and in its original packaging.
Return procedure for MP28115DQ-LF-Z:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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