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Monolithic Power Systems Inc. MP28128DQ-LF-P
- Part No.:
- MP28128DQ-LF-P
- Manufacturer:
- Monolithic Power Systems Inc.
- Package:
- 10-VFDFN Exposed Pad
- Datasheet:
-
MP28128DQ-LF-P.pdf
- Description:
- IC REG BUCK ADJ 2.5A 10QFN
- Quantity:
- Payment:
- Shipping:
Inventory:4,403
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Product details
Overview
MP28128DQ-LF-P from Monolithic Power Systems is a 1.5MHz fixed-frequency synchronous step-down DC/DC converter delivering up to 2.5A output current from a 2.7V–6V input, with adjustable output (0.8V to 0.9×VIN), integrated 80mΩ high-side and 60mΩ low-side MOSFETs, and power-good monitoring-used in FPGA core supplies and point-of-load regulation for telecom equipment.
For engineers reviewing the MP28128DQ-LF-P datasheet, MP28128DQ-LF-P pinout, MP28128DQ-LF-P application, or MP28128DQ-LF-P equivalent, key selection criteria include its internal compensation, 1.5% FB voltage accuracy, 120µs soft-start, frequency synchronization capability (1–2MHz), and thermal shutdown with hiccup protection-critical for compact, high-efficiency embedded power designs.
Technical Context
The MP28128DQ-LF-P employs peak-current-mode control with integrated Type II compensation, eliminating external compensation components while enabling stable loop response across ceramic-capacitor-based designs. Its transconductance error amplifier delivers 11.25A/V gain from COMP to output current, simplifying transient performance tuning via FB divider resistor selection.
It features dual-function EN/SYNC pin supporting both enable/disable logic (1.6V/0.4V thresholds) and external clock synchronization (1–2MHz), with automatic fallback to internal oscillator if sync signal violates timing constraints (>4µs ON/OFF). The POK output provides ±10% output voltage window detection with 30µs deglitching and open-drain drive.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Current | 2.5A continuous-supports high-current digital loads like ASIC/FPGA cores without external current boosting. |
| Input Voltage Range | 2.7V to 6V-compatible with single-cell Li-ion, USB PD, and 3.3V/5V intermediate bus systems. |
| Feedback Accuracy | ±1.5% at +25°C, ±2% over –40°C to +85°C-ensures tight regulation for sensitive I/O and core rails. |
| Switching Frequency | 1.5MHz fixed (±20%)-enables use of small 0.47–1µH inductors and reduces EMI filter size. |
| High-Side RDS(on) | 80mΩ @ 300mA-minimizes conduction loss at full load, contributing to >90% efficiency at 5V→1.8V/2.5A. |
| Soft-Start Time | 120µs internal-prevents inrush current during power-up and enables controlled pre-biased output startup. |
| Thermal Shutdown | 150°C with 20°C hysteresis-protects against sustained overload or poor PCB thermal design without latch-off. |
Pinout & Package
The MP28128DQ-LF-P is housed in a thermally enhanced 3mm × 3mm, 10-lead QFN package with exposed thermal pad (connected to GND), optimized for high-power density and low θJA (50°C/W).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 FB | Feedback Input | Connects to resistive divider; regulates output by comparing to internal 0.8V reference-sets VOUT = 0.8V × (1 + R1/R2). |
| 2,9 GND / Exposed Pad | Power & Signal Ground | Primary return path for input/output currents and IC bias; exposed pad must be soldered to large GND copper for thermal and EMI performance. |
| 3,8 SW | Switch Node | Connection point for external inductor; carries high di/dt switching waveform-requires short, wide trace routing away from noise-sensitive nodes. |
| 4,7 IN | Input Supply | Dual-input pins reduce impedance; require local 10–47µF ceramic decoupling capacitors placed adjacent to minimize VIN ripple and EMI. |
| 5 BS | Bootstrap Supply | Drives high-side gate via external capacitor to SW; enables N-channel high-side switch without external charge pump. |
| 6 POK | Power Good Output | Open-drain indicator asserting HIGH when VOUT is within ±10%-used for system sequencing and fault reporting. |
| 10 EN/SYNC | Enable & Sync Input | Dual-mode pin: logic-level enable (0.4V/1.6V thresholds) or 1–2MHz external clock input for EMI reduction and multi-rail synchronization. |
Key Features
| Feature | Design Value |
|---|---|
| All-ceramic capacitor support | Eliminates electrolytic output caps-reduces board area, improves reliability, and avoids ESR-related loop instability. |
| Internal soft-start | 120µs fixed timing prevents input surge and enables safe startup into pre-biased outputs without reverse current. |
| Hiccup-mode short-circuit protection | Shuts down on sustained overload, discharges soft-start cap, then retries-limits power dissipation and prevents thermal runaway. |
| Frequency synchronization input | Accepts 1–2MHz external clock to align switching edges across multiple rails-reducing beat frequencies and conducted EMI peaks. |
| Integrated power MOSFETs | 80mΩ high-side + 60mΩ low-side switches eliminate external FETs and Schottky diodes-reducing BOM count and layout complexity. |
Applications
| FPGA Core Supply | ASIC I/O Rail |
|---|---|
Use Scenario: Providing tightly regulated 0.85V–1.2V core voltage to Xilinx or Intel FPGA devices during dynamic reconfiguration and high-speed data processing. IC Role / Device Role / Timing Role: Primary synchronous buck regulator delivering 2.5A peak current with <1.5% output accuracy and fast transient response to handle sudden DVFS load steps. Use Value: Internal compensation and 1.5MHz operation enable sub-1mm² solution size with minimal external components-critical for dense FPGA carrier boards. | Use Scenario: Generating stable 1.8V or 2.5V I/O supply for multi-gigabit SerDes interfaces and memory controllers in networking SoCs. IC Role / Device Role / Timing Role: Point-of-load regulator with POK output synchronized to system reset sequencing and EN/SYNC aligned with other rails for deterministic power-up timing. Use Value: ±10% POK window and 30µs deglitch ensure reliable handshaking with FPGA configuration logic-preventing premature release of POR signals. |
| Telecom Point-of-Load | Industrial LCD Display Bias |
Use Scenario: Converting 5V intermediate bus to 3.3V for Ethernet PHYs and packet processors in compact access switches and edge routers. IC Role / Device Role / Timing Role: High-efficiency, low-noise buck converter operating at 1.5MHz to avoid interference with 10/100/1000BASE-T signaling bands. Use Value: 90%+ efficiency at full load and integrated MOSFETs reduce heat generation in sealed, fanless enclosures-extending MTBF. | Use Scenario: Powering TFT-LCD source driver ICs requiring clean, low-ripple 5V or 12V bias rails in factory automation HMIs and medical displays. IC Role / Device Role / Timing Role: Secondary buck stage stepping down 12V or 24V system rail to precise display bias voltages with hiccup protection against panel short faults. Use Value: Thermal shutdown with 20°C hysteresis prevents latch-up during intermittent short events-maintaining display uptime in harsh environments. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous step-down regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS54227PWR | 2.2A max output, 2.95–6V input, 700kHz–2.2MHz adjustable frequency, no internal compensation-requires external RC network. | Lacks integrated soft-start and POK; requires more external components for equivalent functionality. | Choose when variable frequency tuning or higher input voltage margin is required, and board space allows added compensation parts. |
| RT7297BZSP | 2.5A output, 2.7–5.5V input, 1.5MHz fixed frequency, but only 2% FB accuracy and no frequency sync input. | No EN/SYNC pin-limits EMI control in multi-rail systems; lower accuracy impacts low-voltage core rail stability. | Select for cost-sensitive industrial applications where ±2% regulation and absence of sync are acceptable trade-offs. |
Compared with TPS54227PWR and RT7297BZSP, the MP28128DQ-LF-P offers superior integration (internal compensation, soft-start, POK, sync), tighter 1.5% FB accuracy, and robust hiccup protection-making it optimal for space-constrained, high-reliability FPGA and telecom PoL designs where component count and startup predictability are critical.
Availability
MP28128DQ-LF-P is available at Aetrix Electronics and suitable for FPGA core supplies, ASIC I/O rails, and telecom point-of-load regulators requiring stable component supply, RoHS-compliant packaging, and guaranteed long-term availability.
Supply support for MP28128DQ-LF-P includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and power ICs, with expertise in DC/DC conversion, LED drivers, and motor control solutions.
The MP28128 belongs to MPS's high-density synchronous buck regulator product line, designed specifically for compact, high-efficiency point-of-load applications in computing, networking, and industrial electronics where minimal external components and thermal robustness are essential.
FAQ
What is the minimum recommended output capacitance for stable operation?
The MP28128DQ-LF-P requires ≥47µF ceramic output capacitance (X5R/X7R) for stable regulation and optimal transient response. Lower values may cause loop instability or excessive output ripple, especially under 2.5A load steps. Electrolytic capacitors are discouraged due to ESR-induced phase margin degradation.
Does MP28128DQ-LF-P support pre-biased output startup?
Yes-it disables switching until the internal soft-start capacitor voltage exceeds the sensed FB voltage, preventing reverse current flow into a pre-charged output. This behavior is confirmed in the functional description and ensures safe startup into existing bus voltages without external circuitry.
Can the EN/SYNC pin be left floating?
No-EN/SYNC must be actively pulled to a defined logic level. Floating operation risks erratic enable/disable behavior or unintended synchronization attempts. Tie to VIN via 100kΩ resistor for always-on operation, or to GND via 100kΩ for permanent disable.
What is the maximum allowable input voltage spike?
The absolute maximum IN-to-GND rating is +6.5V. Transient spikes exceeding this-even briefly-risk permanent damage. External TVS clamping or LC filtering is recommended if input sources exhibit >6.5V overshoot, such as hot-swap or battery insertion events.
How does the bootstrap capacitor value affect performance?
A 0.1µF ceramic capacitor between BS and SW is standard. Undersizing causes high-side gate drive collapse under heavy load, increasing RDS(on) and reducing efficiency. Oversizing adds unnecessary cost and board area without benefit-verified in MPS application note AN105.
Is an external Schottky diode required for 2.5A operation?
Not required-but recommended for >2A loads per MPS application guidance. An external 0.5A, 20V Schottky diode across SW–GND minimizes negative voltage spikes and improves efficiency by ~0.5–1% at full load, especially with high-inductance layouts.
What PCB layer count is recommended for thermal performance?
A four-layer PCB is strongly recommended: dedicated GND and power planes, with thermal vias under the exposed pad connecting to inner GND layers. Two-layer boards risk thermal derating above 1.8A continuous load due to insufficient heat spreading.
MP28128DQ-LF-P Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Monolithic Power Systems Inc.
- Series:
- -
- Package/Case:
- 10-VFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Not For New Designs
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 2.7V
- Voltage - Input (Max):
- 6V
- Voltage - Output (Min/Fixed):
- 0.8V
- Voltage - Output (Max):
- 5.4V
- Current - Output:
- 2.5A
- Frequency - Switching:
- 1.5MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-QFN (3x3)
MP28128DQ-LF-P FAQ
1.How can I place an order for MP28128DQ-LF-P through Aetrix?
Please submit a Request for Quotation (RFQ) for MP28128DQ-LF-P on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MP28128DQ-LF-P reliable?
The price and inventory of MP28128DQ-LF-P are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MP28128DQ-LF-P is usually 5 days.
3.What payment methods are accepted for MP28128DQ-LF-P?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MP28128DQ-LF-P transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MP28128DQ-LF-P?
MP28128DQ-LF-P orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MP28128DQ-LF-P order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MP28128DQ-LF-P?
For technical support, including MP28128DQ-LF-P datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MP28128DQ-LF-P requirements.
6.How does Aetrix verify that MP28128DQ-LF-P is sourced from the original manufacturer or authorized distributors?
All MP28128DQ-LF-P products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MP28128DQ-LF-P meets industry standards.
7.What is the process for return or replacement of MP28128DQ-LF-P?
All MP28128DQ-LF-P units undergo pre-shipment inspection (PSI). If there is an issue with MP28128DQ-LF-P, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MP28128DQ-LF-P part is unused and in its original packaging.
Return procedure for MP28128DQ-LF-P:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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