Monolithic Power Systems Inc. MP28248GD-P
- Part No.:
- MP28248GD-P
- Manufacturer:
- Monolithic Power Systems Inc.
- Package:
- 12-TFQFN Exposed Pad
- Datasheet:
-
MP28248GD-P.pdf
- Description:
- IC REG BUCK ADJ 3A 12QFN
- Quantity:
- Payment:

- Shipping:

Inventory:2,486
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Product details
Overview
MP28248GD-P from Monolithic Power Systems is a fully-integrated, synchronous step-down DC/DC converter delivering 3A continuous output current with constant-on-time (COT) control. It operates from 4.2V to 20V input, regulates output from 0.815V to 13V, and achieves >90% efficiency at 12VIN/1.2VOUT/3A. Used in networking power rails where fast transient response and compact size are critical.
For engineers reviewing the MP28248GD-P datasheet, MP28248GD-P pinout, MP28248GD-P application, or MP28248GD-P equivalent, key selection criteria include its 2×3mm QFN12 package, programmable switching frequency via external resistor, integrated high- and low-side MOSFETs (120mΩ/50mΩ RDS(ON)), soft-start/stop control, and full protection suite (OCP, SCP, OVP, UVP, thermal shutdown).
Technical Context
The MP28248GD-P implements proprietary constant-on-time (COT) control with feed-forward input voltage sensing, enabling sub-100ns on-time adjustment and eliminating loop compensation components. Its internal architecture integrates dual MOSFET drivers, a 5V LDO bias supply, and a dedicated bootstrap regulator for high-side gate drive.
Protection logic includes cycle-by-cycle over-current detection with 50µs hiccup hold-off, immediate short-circuit response when VFB < 0.4075V, and non-latching thermal shutdown at 150°C with 25°C hysteresis. The device supports both CCM and skip-mode operation, automatically transitioning based on load current to maintain >85% efficiency down to 10mA.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 4.2V to 20V - supports 5V, 12V, and 24V industrial bus rails without pre-regulation |
| Output Current | 3A continuous - sustains full load at 125°C junction temperature with proper PCB copper area |
| Output Voltage Range | 0.815V to 13V - set by external resistor divider; 815mV feedback reference enables precise low-VOUT regulation |
| Switching Frequency | Programmable via RFREQ - 480kHz typical at R7=600kΩ, enabling small 2.2µH inductors and 22µF ceramic output caps |
| HS/LS RDS(ON) | 120mΩ / 50mΩ - reduces conduction loss; enables >92% peak efficiency at 12VIN/3.3VOUT/2A |
| Soft-Start Time | Programmable via CSS - 1.92ms with 33nF capacitor prevents inrush current and avoids current-limit triggering |
| Quiescent Current | 440–490µA - enables low-power standby modes in always-on networking equipment |
Pinout & Package
MP28248GD-P is housed in a thermally enhanced 12-pin QFN package (2mm × 3mm, 0.5mm pitch) with an exposed thermal pad. The package supports ≤1.8W continuous power dissipation at TA=25°C (θJA=70°C/W) and requires ≥6 thermal vias to inner ground planes for optimal thermal performance.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 11, 12 GND | System Ground Reference | Primary return path for power and signal; must connect to solid ground plane with multiple vias to minimize noise coupling into FB/SS |
| 2, 10 SW | Switch Node | High-dI/dt node connecting internal HS/LS FETs to external inductor; requires wide copper traces and minimal loop area to reduce EMI |
| 3 BST | Bootstrap Supply | Connects to SW via 0.1µF ceramic capacitor to generate floating gate drive voltage for HS-FET; critical for reliable 100% duty cycle capability |
| 4 VCC | Bias Supply Input | Internal LDO input; requires 1µF ceramic decoupling placed within 2mm to suppress switching noise and stabilize gate drivers |
| 5 EN | Enable Control | Logic-level input (1.05–1.6V threshold); pull-up to VIN enables automatic start-up; open-drain compatible for sequencing control |
| 6 SS | Soft-Start Timing | Connects to external capacitor; 14µA charge/4.5µA discharge current sets ramp time; decouples startup stress from input capacitors |
| 7 FB | Feedback Input | Monitors output via resistor divider; 30–50nA input bias enables high-value dividers (e.g., 1MΩ/100kΩ) for low quiescent loss |
| 8 FREQ | Frequency Set | Connects to VIN via resistor R7; sets switching frequency independent of input/output voltage - simplifies design across wide VIN range |
| 9 IN | Main Power Input | 4.2–20V supply input; requires local 10µF X5R/X7R ceramic capacitor with ≥1.5A RMS rating to handle high-frequency ripple current |
Key Features
| Feature | Design Value |
|---|---|
| Constant-On-Time (COT) Control | Enables <10µs load transient recovery without external compensation components - critical for CPU/GPU core rail stability |
| Integrated Dual MOSFETs | 120mΩ HS + 50mΩ LS RDS(ON) eliminates external FETs and gate drivers - reduces BOM count and layout complexity |
| Programmable Switching Frequency | R7-based setting allows optimization for EMI (≤500kHz) or size (≥1MHz) without changing IC - supports multi-rail system tuning |
| Comprehensive Protection Suite | Non-latching OVP/UVP, cycle-by-cycle OCP with hiccup mode, and thermal shutdown with 25°C hysteresis - ensures robust field operation under fault conditions |
| Soft-Start/Stop with Programmable Ramp | 14µA/4.5µA internal current sources enable precise control of output voltage slew rate - prevents overshoot and inrush during hot-swap events |
Applications
| Networking Power Rails | Distributed Telecom Supplies |
|---|---|
Use Scenario: Providing 3.3V/3A power to Ethernet PHYs and switch fabric ASICs in 1U rack-mounted switches. IC Role / Device Role / Timing Role: Primary point-of-load (POL) regulator converting 12V mid-rail to stable 3.3V with <±1% line/load regulation. Use Value: Fast transient response (<10µs) maintains signal integrity during burst traffic; QFN12 footprint saves board space in dense port layouts. | Use Scenario: Generating 5V/2.5A for remote radio unit (RRU) baseband processors in 4G/5G small cells. IC Role / Device Role / Timing Role: High-efficiency buck converter operating from 24V backplane, supporting -40°C to +85°C ambient. Use Value: 90%+ efficiency at light load extends thermal margin; programmable frequency avoids interference with RF front-end clocks. |
| Industrial IoT Gateways | Embedded Computing Modules |
Use Scenario: Delivering 1.2V/3A to ARM Cortex-A series SoCs in edge AI gateways with fanless cooling. IC Role / Device Role / Timing Role: Core processor supply with soft-start sequencing and thermal foldback to prevent throttling. Use Value: Integrated OCP/SCP protects against shorted daughterboards; 2×3mm package enables compact module designs. | Use Scenario: Powering DDR4 memory subsystems (1.2V) and I/O rails (3.3V) in COM Express Type 7 modules. IC Role / Device Role / Timing Role: Secondary POL regulator fed from 5V intermediate bus, supporting dynamic voltage scaling. Use Value: Adjustable output (0.815–13V) enables reuse across multiple voltage domains; low IQ extends battery backup runtime. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous step-down converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MP28164DQ-LF-Z | 2A output, 4.5–18V input, fixed 500kHz fSW, no FREQ pin | Lacks programmable frequency and 3A capability; lower thermal margin in 24V input scenarios | Select when cost sensitivity outweighs need for 3A output or frequency tuning |
| TPS54332DR | 3A output, 3.5–28V input, current-mode control, external compensation required | Requires loop compensation network; higher BOM count and layout sensitivity than MP28248GD-P's COT architecture | Choose when design already uses TI ecosystem tools or needs wider input range beyond 20V |
Compared with MP28248GD-P, MP28164DQ-LF-Z trades output current and flexibility for lower unit cost, while TPS54332DR offers broader input range but increases design complexity with external compensation - MP28248GD-P delivers optimal balance of integration, transient performance, and thermal efficiency in space-constrained 12V/24V systems.
Availability
MP28248GD-P is available at Aetrix Electronics and suitable for networking systems, distributed telecom supplies, industrial IoT gateways, and embedded computing modules requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for MP28248GD-P includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and power ICs, with over two decades of expertise in DC/DC conversion, motor drivers, and LED lighting controllers.
The MP28248 belongs to MPS's high-efficiency, fast-transient synchronous buck converter product line, engineered specifically for compact, high-density power delivery in networking, telecom, and industrial embedded systems where thermal performance and transient immunity are critical.
FAQ
What is the minimum recommended input capacitance for MP28248GD-P?
MP28248GD-P requires ≥10µF of X5R/X7R ceramic capacitance placed within 2mm of the IN pin, rated for ≥1.5A RMS ripple current. At 24V input and 3A output, input RMS current reaches ~1.5A; using two 10µF/25V 0805 capacitors in parallel meets both capacitance and current rating requirements while minimizing ESL.
How does the MP28248GD-P handle light-load efficiency?
The MP28248GD-P automatically enters skip mode below ~300mA load, reducing switching frequency to maintain >85% efficiency at 10mA. Unlike forced PWM, this mode disables LS-FET driver (high-Z) and limits reverse inductor current to ~−1mA, minimizing gate and conduction losses without external control.
Can MP28248GD-P operate with ceramic output capacitors without external ramp compensation?
No - ceramic capacitors' low ESR causes subharmonic oscillation in COT mode. External ramp compensation (R4/C4 network) is mandatory per Equation 5 in the datasheet. Failure to implement it results in audible noise and output voltage instability under dynamic loads.
What is the thermal pad soldering requirement for the QFN12 package?
The exposed thermal pad must be soldered to a solid copper ground plane using ≥6 thermal vias (0.3mm diameter, filled or capped), each connected to inner-layer ground planes. Insufficient thermal vias cause junction temperature to exceed 125°C at 2.5A/12VIN, triggering thermal shutdown.
Does MP28248GD-P support output voltages below 0.815V?
No - the internal reference is trimmed to 815mV ±8mV (807–823mV), and the FB comparator architecture does not support scaling below this value. For sub-0.8V outputs, a different converter with adjustable reference or external error amplifier is required.
How is over-current protection triggered and recovered?
OCP triggers after five consecutive cycles exceeding 4–5A peak inductor current, initiating 50µs hiccup timer. If fault persists, device enters periodic restart (hiccup mode) with ~100ms off-time. Recovery is automatic upon removal of overload - no manual reset or power cycle needed unless OVP is latched.
What is the maximum allowable BST capacitor value?
The BST capacitor must be 0.1µF ceramic (X7R, 16V rating). Values >0.22µF increase bootstrap recharge time, risking HS-FET misfire during high-duty-cycle operation (e.g., 5VOUT/20VIN). Smaller values (<0.068µF) cause excessive ripple on BST node, degrading gate drive strength.
MP28248GD-P Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Monolithic Power Systems Inc.
- Series:
- -
- Package/Case:
- 12-TFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Not For New Designs
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 4.2V
- Voltage - Input (Max):
- 20V
- Voltage - Output (Min/Fixed):
- 0.815V
- Voltage - Output (Max):
- 13V
- Current - Output:
- 3A
- Frequency - Switching:
- -
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 12-QFN (2x3)
MP28248GD-P FAQ
1.How can I place an order for MP28248GD-P through Aetrix?
Please submit a Request for Quotation (RFQ) for MP28248GD-P on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MP28248GD-P reliable?
The price and inventory of MP28248GD-P are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MP28248GD-P is usually 5 days.
3.What payment methods are accepted for MP28248GD-P?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MP28248GD-P transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MP28248GD-P?
MP28248GD-P orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MP28248GD-P order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MP28248GD-P?
For technical support, including MP28248GD-P datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MP28248GD-P requirements.
6.How does Aetrix verify that MP28248GD-P is sourced from the original manufacturer or authorized distributors?
All MP28248GD-P products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MP28248GD-P meets industry standards.
7.What is the process for return or replacement of MP28248GD-P?
All MP28248GD-P units undergo pre-shipment inspection (PSI). If there is an issue with MP28248GD-P, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MP28248GD-P part is unused and in its original packaging.
Return procedure for MP28248GD-P:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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