Monolithic Power Systems Inc. MP28300GG-Z

Overview

MP28300GG-Z from Monolithic Power Systems is a dual-output power management IC integrating a 300mA ultra-low-I_Q step-down converter (500nA) and a 100mA low-dropout regulator (300nA), both operating from 2.0V–5.5V input, in a QFN-12 (2mm×2mm) package. It delivers seven selectable buck outputs (0.8V–3.3V) and three LDO outputs (1.3V–3.3V) via dedicated CTRL pins, enabling dynamic voltage scaling for battery-powered wearables and IoT edge nodes.

For engineers reviewing the MP28300GG-Z datasheet, MP28300GG-Z pinout, MP28300GG-Z application, or MP28300GG-Z equivalent, key selection criteria include its 500nA buck I_Q, 100% duty-cycle dropout operation, integrated OCP/UVLO/thermal shutdown, and dual independent enable/control logic for simultaneous but decoupled regulation of mixed-voltage subsystems.

Technical Context

The MP28300GG-Z implements constant-on-time (COT) control for its buck stage-enabling fast transient response, stable ~1.5MHz switching across input/output combinations, and seamless PWM-to-PFM transition at light loads. Its COT architecture eliminates external compensation and minimizes output capacitance requirements while maintaining tight regulation via an integrated error amplifier.

The LDO section operates independently with fixed 300nA quiescent current, 50mV dropout at 100mA, and programmable output selection via two CTRL pins. Both regulators feature separate VIN inputs (VIN1/VIN2), independent soft-start (0.5ms buck / 2ms LDO), and open-drain PG1 for the buck stage only-requiring external pull-up for system power-good signaling.

Key Specifications

Pinout & Package

MP28300GG-Z is housed in a thermally enhanced QFN-12 package (2mm × 2mm, 0.5mm pitch) with exposed thermal pad. Pin numbering follows standard top-view orientation; GND (Pin 8) and thermal pad are internally connected for optimal heat dissipation.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-output PMIC applications.

Compared with TPS62748IRYR and MAX20004AATP+, MP28300GG-Z uniquely balances nanoamp quiescent operation, dual independent inputs, programmable outputs, and integrated PG signaling-making it optimal for space-constrained, battery-limited IoT endpoints where both efficiency and design flexibility are non-negotiable.

Availability

MP28300GG-Z is available at Aetrix Electronics and suitable for wearable health monitors, smart sensor nodes, and portable medical diagnostic tools requiring stable component supply, long-term lifecycle assurance, and RoHS-compliant packaging.

Supply support for MP28300GG-Z includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and power ICs, with design centers in the US, China, and Taiwan, and global manufacturing partnerships.

The MP28300 belongs to MPS's ultra-low-I_Q power management portfolio, engineered specifically for energy-harvesting and battery-operated edge devices where micropower efficiency and minimal external components define system viability.

FAQ

What is the minimum input voltage required for the MP28300GG-Z to regulate its buck output?

The MP28300GG-Z maintains regulation down to 2.0V input for both buck and LDO sections. Below this threshold, UVLO disables both regulators-ensuring safe operation during deep battery discharge. The 100% duty-cycle mode sustains output voltage even when V_IN approaches V_OUT, extending usable battery range beyond conventional buck converters.

Can the buck and LDO sections operate from different input sources?

Yes. VIN1 powers the buck stage and VIN2 powers the LDO stage-each with independent 2.0V–5.5V operating ranges. This allows separation of noisy switching rails from sensitive analog supplies, improves fault containment, and supports hybrid power architectures (e.g., main battery + supercap backup).

How does the MP28300GG-Z achieve 500nA quiescent current in the buck stage?

It combines constant-on-time control with adaptive sleep mode: when pulse intervals exceed ~6µs, internal blocks-including gate drivers and reference circuits-are powered down. This ultra-deep sleep state is entered automatically at light loads and exits within 5µs, preserving efficiency without sacrificing transient response.

Is an external pull-up resistor required for the PG1 pin?

Yes. PG1 is an open-drain output and requires an external pull-up resistor (100kΩ–500kΩ) to either VIN1 or a stable CTRL voltage. Without it, the power-good signal cannot assert high, preventing reliable system power sequencing or supervisor IC interfacing.

What happens to the outputs when CTRL1–3 or CTRL4–5 are left floating?

Leaving any CTRL pin floating violates the absolute maximum ratings and may cause erratic output voltage, unintended enable/disable toggling, or increased I_Q. Unused CTRL pins must be hard-tied to GND; used pins must never be driven below VIN to prevent reverse current injection into internal logic.

Does the MP28300GG-Z support dynamic voltage scaling during operation?

Yes. Changing the logic state of CTRL1–3 or CTRL4–5 while enabled reconfigures the output voltage within microseconds-enabling real-time adaptation to processing load, sensor sampling rate, or wireless transmission power level without resetting the device.

What thermal derating applies to the MP28300GG-Z at 125°C ambient?

At T_A = 125°C, the maximum continuous power dissipation drops to ~0.5W due to θ_JA = 80°C/W. Full 300mA buck output is only sustainable below 85°C ambient; above that, output current must be reduced per the thermal derating curve in the datasheet to avoid triggering 150°C thermal shutdown.