Monolithic Power Systems Inc. MP28301GG-P

Overview

MP28301GG-P from Monolithic Power Systems is a dual-output power management IC integrating a 700mA step-down converter (500nA IQ) and a 100mA LDO (300nA IQ) in a single QFN-12 (2mm×2mm) package. It operates from 2.0V–5.5V input, supports seven selectable buck outputs (0.8V–3.3V) and three LDO outputs (1.2V–3.0V), and delivers ultra-low quiescent current for battery-powered wearables and IoT edge nodes.

For engineers reviewing the MP28301GG-P datasheet, MP28301GG-P pinout, MP28301GG-P application, or MP28301GG-P equivalent, this device enables simultaneous low-power rail generation with fast transient response via COT control, integrated fault protection (UVLO, OCP, thermal shutdown), and dynamic voltage scaling via dedicated CTRL pins - critical for energy-constrained embedded systems requiring long battery life and compact BOMs.

Technical Context

The MP28301GG-P implements a constant-on-time (COT) control architecture for its buck stage, delivering stable ~1.5MHz switching frequency across input/output combinations and enabling rapid load transient response without external compensation. Its dual-regulator topology shares ground and thermal substrate but maintains independent input (VIN1/VIN2) and output (OUT1/OUT2) paths, supporting mixed-voltage system partitioning.

Both regulators feature programmable enable and output voltage selection via logic-level CTRL pins (CTRL1–CTRL5), with built-in soft-start (110µs buck / 2ms LDO), open-drain power-good (PG1), and output discharge functionality. Fault handling includes cycle-by-cycle over-current protection, hiccup-mode short-circuit recovery, and thermal shutdown with 30°C hysteresis.

Key Specifications

Pinout & Package

MP28301GG-P is housed in a thermally optimized QFN-12 (2mm×2mm) package with exposed thermal pad (EP) on underside for efficient heat dissipation. The pinout supports independent buck and LDO inputs/outputs, programmable voltage selection, and system monitoring via open-drain PG1.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-output PMU applications.

Compared with TPS62840DLCR and MAX20004AATP+T, MP28301GG-P uniquely balances ultra-low IQ (500nA/300nA), dual-rail integration, and pin-strapped simplicity - making it optimal for cost-sensitive, space-constrained, battery-limited designs where firmware simplicity and maximum runtime are primary constraints.

Availability

MP28301GG-P is available at Aetrix Electronics and suitable for wearable health monitors, smart sensor nodes, portable medical instruments, and industrial asset trackers requiring stable component supply across extended production lifecycles.

Supply support for MP28301GG-P includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and power ICs, with design centers in the US, China, and Taiwan, and global manufacturing partnerships.

The MP28301GG-P belongs to MPS's ultra-low-IQ power management unit (PMU) product line, engineered specifically for energy-harvesting and battery-powered edge devices demanding multi-rail efficiency, minimal quiescent draw, and robust thermal performance in miniature packages.

FAQ

What is the minimum input voltage required for the MP28301GG-P to regulate both rails?

The MP28301GG-P requires ≥2.0V on VIN1 for buck regulation and ≥2.0V on VIN2 for LDO regulation. Both rails remain functional down to exactly 2.0V input, enabling operation from near-dead alkaline or Li-ion cells. Below 2.0V, UVLO disables each regulator independently.

Can the buck and LDO outputs be set to the same voltage simultaneously?

Yes - the buck (OUT1) supports 1.8V via CTRL1/2/3 = H/L/H, and the LDO (OUT2) supports 1.8V by connecting OUT2 to an external resistor divider (not natively selectable). However, the native LDO outputs are 1.2V, 2.5V, and 3.0V only; 1.8V requires external feedback.

How does the MP28301GG-P handle short-circuit events on the buck output?

Upon detecting output voltage <50% of regulation level plus current limit activation, the buck enters hiccup mode: it disables the power stage, discharges OUT1 via internal discharge path, waits ~10ms, then attempts restart. This repeats until fault clears, protecting both IC and external components.

Is thermal pad connection mandatory for reliable operation?

Yes - the exposed thermal pad (EP) under the QFN-12 package must be soldered to a solid copper pour tied to GND. Without proper thermal pad connection, junction temperature rises rapidly under 700mA load, triggering thermal shutdown at ambient >65°C.

What is the maximum allowable output capacitance for stable COT operation?

The MP28301GG-P is characterized for stability with ≤22µF ceramic output capacitance per rail. Larger values may cause ringing or delayed transient recovery due to COT loop interaction; if higher capacitance is required, add a 100mΩ damping resistor in series with the capacitor.

Does the LDO section provide reverse current blocking when VIN2 is disconnected?

No - the LDO lacks reverse current blocking. If VIN2 falls below OUT2 while the LDO is enabled, reverse current flows from OUT2 into VIN2. To prevent this, place a Schottky diode (e.g., PMEG2005) between VIN2 and OUT2 in high-reliability systems.

How does the CTRL pin logic interact with the EN function?

CTRL1/2/3 and CTRL4/5 serve dual roles: any high signal on CTRL1/2/3 enables the buck and selects its voltage; similarly, any high on CTRL4/5 enables the LDO. Pulling all three buck CTRL pins low disables the buck; pulling both LDO CTRL pins low disables the LDO - no separate EN pin is required.