Monolithic Power Systems Inc. MP2926GUT-0000-Z

Overview

MP2926GUT-0000-Z from Monolithic Power Systems is a triple-loop, digital, multi-phase VR controller supporting up to 2 phases per rail for SoC and DDR memory power delivery. It integrates PMBus/I²C interface (1MHz), on-chip NVM for configuration storage, nonlinear digital control for fast transient response, and supports Intelli-Phase™ DrMOS devices. Key parameters include 200kHz–3MHz switching frequency, ±1% IMON gain accuracy, and 10-bit ADC with 1.5625mV LSB.

For engineers reviewing the MP2926GUT-0000-Z datasheet, MP2926GUT-0000-Z pinout, MP2926GUT-0000-Z application, or MP2926GUT-0000-Z equivalent, this controller is selected for high-efficiency, digitally programmable, triple-rail voltage regulation in telecom base stations, AI accelerators, and DDR5 memory subsystems where adaptive phase shedding, remote sensing, and fault logging are critical.

Technical Context

The MP2926 implements a unified digital power loop using nonlinear control-eliminating separate steady-state and transient compensation networks. Its quantum state detection engine dynamically adjusts PWM on-time in real time based on VIN, VOUT, and configured fSW, enabling stable operation across wide load transients without manual loop tuning.

It features three independent voltage rails with differential remote sensing (VOSEN/VORTN pairs), configurable PVID inputs for dynamic VID updates, and integrated protection comparators for OVP/UVP/OCP/OTP with latch, hiccup, or no-action modes. Fault types-including Intelli-Phase™ diagnostics-are auto-recorded to NVM for post-fault analysis.

Key Specifications

Pinout & Package

MP2926GUT-0000-Z is housed in a thermally enhanced QFN-40 (5mm × 5mm) package with exposed thermal pad (AGND). The 40-pin layout supports triple-rail control, six PWM outputs, six current-sense inputs, three differential voltage sense pairs, three temperature sense inputs, and full PMBus connectivity.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar multi-phase digital controller applications.

Compared with ISL68224IRAZ-T and TPS53689TSSR, MP2926GUT-0000-Z uniquely delivers triple independent rails with full PMBus programmability, on-chip NVM for field-updatable configurations, and native PVID support-making it optimal for heterogeneous SoC+memory power architectures where rail autonomy and firmware-defined behavior are essential.

Availability

MP2926GUT-0000-Z is available at Aetrix Electronics and suitable for AI accelerator core power, DDR5 memory subsystems, and 5G base station RF units requiring stable component supply, long-term lifecycle support, and traceable sourcing.

Supply support for MP2926GUT-0000-Z includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance power management ICs, with design centers in the US, China, and Taiwan, and global manufacturing partnerships.

The MP2926 belongs to MPS's Intelli-Phase™-compatible digital VR controller product line, engineered specifically for high-density, multi-rail computing and networking applications demanding programmable efficiency, precision regulation, and robust fault diagnostics.

FAQ

What is the function of the STB pin on MP2926GUT-0000-Z?

The STB (Standby) pin is an open-drain output that forces connected Intelli-Phase™ DrMOS devices into standby mode when pulled high. It synchronizes with the DrMOS SYNC pin to coordinate power-down sequencing across multiple phases, reducing leakage current during idle states without disabling the controller itself.

How does the MP2926GUT-0000-Z implement automatic loop compensation?

It uses a fixed, internally optimized digital control algorithm based on quantum state detection-not adaptive tuning. Compensation is "automatic" in that no external components or manual register writes are needed; the nonlinear control law inherently stabilizes both steady-state and transient conditions using real-time VIN/VOUT/fSW inputs.

Can MP2926GUT-0000-Z support different phase counts across its three rails?

Yes. Via PMBus register MFR_PHASE_PSI_CFG (70h), each rail can be independently configured for 1 or 2 phases (e.g., Rail 1: 2-phase, Rail 2: 1-phase, Rail 3: 2-phase). Unused PWM and CS pins default to Hi-Z/middle state, and active phases interleave automatically without firmware intervention.

What is the purpose of the PVID0–PVID2 pins?

PVID0–PVID2 form a 3-bit parallel interface for dynamic voltage identification. They accept TTL-level inputs to select one of eight predefined output voltages (e.g., 0.6V–1.2V in 75mV steps), enabling hardware-triggered overclocking or low-power states without PMBus traffic-critical for real-time performance scaling.

Does MP2926GUT-0000-Z require external components for basic operation with Intelli-Phase™ devices?

No. When paired with MPS Intelli-Phase™ DrMOS (e.g., MP86957), only bypass capacitors (1µF on VDD33/VDD18), input/output sense dividers, and thermal resistors are needed. All control, monitoring, and protection logic-including current sensing, remote sensing, and fault reporting-is integrated on-die.

How is fault data preserved after power loss?

Fault events-including type (OCP_TDC, OTP), rail ID, timestamp, and sensed values-are written to on-chip NVM before shutdown. The NVM retains data without power and survives >100,000 write cycles. After reboot, the system can retrieve logs via PMBus READ_EIN command (D0h).

What is the maximum supported PMBus clock frequency?

The MP2926GUT-0000-Z supports 100kHz, 400kHz, and 1MHz PMBus speeds. At 1MHz, setup/hold times meet SMBus 3.0 specs (e.g., 50ns data setup, 0.26μs hold), enabling high-throughput configuration and telemetry polling in dense multi-controller systems.