Monolithic Power Systems Inc. MP3376AGR-XXXX-P

Overview

MP3376AGR-XXXX-P from Monolithic Power Systems is an 8-channel synchronous boost WLED driver IC for LCD backlighting in tablets and notebooks, featuring I²C programmability, 3–30V input range, up to 37.5V output, 50mA/channel max current, and 2.5% channel current matching. It integrates dual MOSFETs (160mΩ LS / 260mΩ HS), supports mixed/linear dimming, and delivers high efficiency via low-headroom LED regulation.

For engineers reviewing the MP3376AGR-XXXX-P datasheet, MP3376AGR-XXXX-P pinout, MP3376AGR-XXXX-P application, or MP3376AGR-XXXX-P equivalent, key selection criteria include I²C address configuration (A0/A1 pins), selectable switching frequency (350kHz–2.4MHz), LED short/open protection thresholds, PWM/analog/mixed dimming modes, and QFN-24 thermal performance (θJA = 46°C/W).

Technical Context

The MP3376AGR-XXXX-P implements peak-current-mode control with a fixed 10MHz internal clock for precise dimming resolution and stable boost regulation across varying LED string voltages. Its feedback loop automatically selects the lowest active LEDX voltage as reference to regulate output sufficiently for all strings.

It integrates an internal 4.9V LDO (VCC) for gate drive and logic, supports synchronous rectification with external BST network (100nF + 47Ω), and features latch-off current limit (3.5A/200ns) plus cycle-by-cycle limiting (1.8/2.5/3A selectable) for robust fault handling.

Key Specifications

Pinout & Package

MP3376AGR-XXXX-P is housed in a thermally enhanced QFN-24 (4mm × 4mm) package with exposed pad (EP) for GND connection, supporting high-power dissipation (2.7W @ TA=25°C) and compact PCB layout.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar WLED driver applications.

Compared with RTQ2133BGQW and ISL97693IRTZ, MP3376AGR-XXXX-P delivers superior integration (dual MOSFETs, VCC LDO, FT disconnect), finer current resolution (0.196mA vs. 0.39mA), and unique mixed-dimming architecture - making it optimal for next-gen portable displays demanding high efficiency, deep dimming, and compact layout.

Availability

MP3376AGR-XXXX-P is available at Aetrix Electronics and suitable for tablet backlighting, notebook display systems, automotive infotainment panels, and industrial HMI applications requiring stable component supply, long-lifecycle support, and RoHS/halogen-free compliance.

Supply support for MP3376AGR-XXXX-P includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and power ICs, with core expertise in DC/DC conversion, LED drivers, and motor control solutions.

The MP3376A product line targets energy-efficient, space-constrained LCD backlighting systems, emphasizing integration (synchronous FETs, LDO, I²C), precision (2.5% current matching), and programmability (OTP, multi-dimming modes) for portable and automotive displays.

FAQ

What is the function of the FT pin on MP3376AGR-XXXX-P?

The FT (Fault Terminal) pin is an open-drain output used to control an external PMOS transistor for input power disconnection. During normal operation, FT pulls low to turn on the PMOS; during fault conditions (OVP, OCP, LED short), it floats to disable the PMOS and isolate the input supply. It also serves as a fault status indicator when monitored externally.

How does the MP3376AGR-XXXX-P achieve 2.5% current matching across 8 channels?

The MP3376AGR-XXXX-P achieves ±2.5% current matching through matched internal current-sense amplifier architecture and precision bandgap reference routing. Each LEDX current sink shares the same reference voltage and gain structure, minimizing process- and temperature-induced mismatches. Matching is measured at 20mA per channel under typical conditions and confirmed in electrical characterization tables.

Can the MP3376AGR-XXXX-P operate without an external bootstrap capacitor?

No - the BST pin requires a 100nF ceramic capacitor and 47Ω resistor connected between BST and SW to generate the gate drive voltage for the internal high-side MOSFET. Omitting this network disables synchronous rectification and forces the device into non-sync mode (if enabled), degrading efficiency and increasing thermal stress on the external diode or LS-FET.

What is the minimum PWM input frequency supported for analog dimming?

The MP3376AGR-XXXX-P supports analog dimming with PWM inputs down to 100Hz, though optimal performance (minimal flicker, accurate duty tracking) is achieved above 1kHz. The internal comparator has 0.4V/1.2V logic thresholds and 500kΩ pull-down, ensuring reliable recognition of low-frequency signals with clean edges and adequate hold time.

Does the MP3376AGR-XXXX-P support daisy-chained I²C addressing?

No - the MP3376AGR-XXXX-P uses hardware-selectable I²C addresses (0x28–0x2B) via A0 and A1 pins only; it does not support software-addressable daisy chaining or broadcast write. Up to four devices can share one I²C bus using distinct A0/A1 combinations, but each requires individual register access.

How is thermal protection implemented in the MP3376AGR-XXXX-P?

Thermal protection uses an on-die temperature sensor with 150°C trip point and 20°C hysteresis. When junction temperature exceeds 150°C, the IC shuts down switching and disables all outputs. Operation resumes only after die temperature falls below 130°C. This protection is independent of other fault flags and activates even during startup or shutdown sequences.

What happens to unused LED channels during startup?

During startup, the MP3376AGR-XXXX-P detects unused LED channels by monitoring LEDX pin voltage: if an LEDX pin is tied to GND or reads <100mV, the channel is automatically disabled and excluded from the feedback loop. This prevents overvoltage on remaining strings and avoids false OVP triggering due to missing load.