Monolithic Power Systems Inc. MP3430HQ-LF-Z
- Part No.:
- MP3430HQ-LF-Z
- Manufacturer:
- Monolithic Power Systems Inc.
- Package:
- 16-VFQFN Exposed Pad
- Datasheet:
-
MP3430HQ-LF-Z.pdf
- Description:
- IC REG BOOST ADJ 600MA 16QFN
- Quantity:
- Payment:

- Shipping:

Inventory:4,000
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
MP3430HQ-LF-Z from Monolithic Power Systems is a monolithic 90V step-up converter with integrated high-side avalanche photodiode (APD) current monitoring, featuring 1.3MHz fixed-frequency current-mode control, 2.7V–5.5V input range, and dual-ratio (1:10 and 1:2) APD current mirror outputs for optical receiver biasing. It delivers up to 90V output with cycle-by-cycle current limiting and thermal shutdown protection.
For engineers reviewing the MP3430HQ-LF-Z datasheet, MP3430HQ-LF-Z pinout, MP3430HQ-LF-Z application, or MP3430HQ-LF-Z equivalent, key selection criteria include APD bias voltage stability, 50ns monitor response speed, programmable APD over-current limit via RLIM, and QFN16 package thermal performance in fiber-optic transceiver modules.
Technical Context
The MP3430HQ-LF-Z employs a constant-frequency, current-mode PWM architecture with internal ramp generation and error amplifier feedback, enabling fast transient response and stable regulation across wide input/output voltage ratios. Its control loop operates at 1.3MHz with internal compensation and soft-start functionality.
It integrates a 100V/1Ω NFET switch with 0.9A current limit and a dedicated high-side APD current monitor with ±5% gain tolerance. The monitor provides two isolated current-sense outputs-MON1 (1:10 ratio) and MON2 (1:2 ratio)-each clamped to ≤3.5V and capable of sourcing up to 2.5mA.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 2.7V to 5.5V - supports single-cell Li-ion or 3.3V/5V system rails without external LDO pre-regulation. |
| Max Output Voltage | 90V - sufficient for biasing high-voltage APDs used in long-haul fiber-optic receivers and lidar front-ends. |
| Switching Frequency | 1.3MHz (typ.) - enables compact magnetics and low-output-ripple design with minimal EMI filtering. |
| APD Monitor Response | 50ns (tdelay1) - captures fast optical transients for real-time APD current control in burst-mode receivers. |
| Current Limit Accuracy | ±5% tolerance on MON1/MON2 gain - ensures precise APD bias current replication for calibrated optical power detection. |
| Thermal Shutdown | 160°C with 10°C hysteresis - protects against sustained overload in sealed optical modules with limited airflow. |
| Package Thermal Resistance | θJA = 60°C/W - allows 2.1W continuous dissipation at +25°C ambient, critical for high-efficiency APD biasing in small form factors. |
Pinout & Package
The MP3430HQ-LF-Z is housed in a thermally enhanced 3mm × 3mm QFN16 package with exposed pad (EP) soldered to PCB ground for optimal heat dissipation and EMI reduction.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 16 PGND | Power Ground | Internally connected ground pins; must both be tied to low-impedance PCB ground plane to minimize switching noise coupling into APD bias path. |
| 2 VIN | Main Input Supply | Accepts 2.7–5.5V; requires local 10µF ceramic bypass capacitor to prevent UVLO dropout during startup current surges. |
| 3 EN | Enable Control | Logic-level input (0.6V disable / 1.6V enable); 1ms RC delay recommended to ensure stable VIN before activation. |
| 5 FB | Voltage Feedback | Connects to resistor divider from VOUT; regulates output using 0.8V reference; requires RC network for phase margin in high-ratio boost. |
| 7 MON2 | APD Current Mirror Output (1:2) | Sources 50% of APD current; converts to voltage via external RMON2; clamped to ≤3.5V for ADC interface safety. |
| 8 AGND | Analog Ground | Separate analog reference node; must be star-connected to PGND near FB/MON pins to avoid digital noise injection. |
| 9 RLIM | APD Over-Current Threshold Set | Resistor-to-ground sets APD current limit (0.36–4.3mA range); linear programming enables precise optical damage prevention. |
| 10 MON1 | APD Current Mirror Output (1:10) | Sources 10% of APD current; optimized for high-resolution monitoring with lower noise than MON2 in low-light conditions. |
| 12 APD | APD Cathode Connection | High-voltage output node (up to 90V); connects directly to APD cathode; layout must minimize parasitic capacitance to reduce ringing. |
| 13 MONIN | Monitor Power Supply | Bias supply for internal current mirrors; requires LC filter to suppress SW node ripple and maintain monitor accuracy. |
| 14, 15 SW | Power Switch Node | Drives external boost inductor; trace must be short and wide to reduce EMI and body-diode reverse recovery losses. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated 100V/0.9A NFET | Eliminates external high-voltage switch, reducing BOM count and layout complexity in space-constrained optical modules. |
| Dual-ratio APD current monitoring | Simultaneous 1:10 (high-precision) and 1:2 (high-signal) outputs enable closed-loop bias control and fault detection in one IC. |
| 50ns APD current response | Enables real-time optical power tracking for adaptive gain control in PON and coherent receiver applications. |
| Programmable APD over-current limit | RLIM pin allows field-adjustable current threshold (0.36–4.3mA), supporting multiple APD types without hardware change. |
| Internal compensation & soft-start | Reduces external component count and eliminates startup overshoot in high-conversion-ratio boost topologies. |
Applications
| Fiber-Optic Transceivers | Lidar Receiver Modules |
|---|---|
Use Scenario: Biasing APDs in SFP+/QSFP+ optical transceivers for 10G/25G PON and datacom links. IC Role / Device Role / Timing Role: Provides regulated 40–70V APD bias while monitoring photocurrent for automatic gain control (AGC) loop feedback. Use Value: Enables single-chip APD bias + monitoring, replacing discrete DC-DC + op-amp solutions and improving channel-to-channel matching in multi-lane modules. | Use Scenario: High-voltage biasing of InGaAs APDs in short-pulse time-of-flight (ToF) lidar receivers. IC Role / Device Role / Timing Role: Delivers 60–90V bias with sub-100ns current monitor response to capture nanosecond-scale return pulses. Use Value: Supports burst-mode operation with fast APD current tracking, improving signal-to-noise ratio in low-reflectivity outdoor environments. |
| Precision Optical Sensors | Industrial Spectrometers |
Use Scenario: Stable APD biasing in lab-grade optical power meters and photon-counting detectors. IC Role / Device Role / Timing Role: Supplies ultra-low-noise 90V bias with <±5% monitor gain accuracy for calibrated photocurrent measurement. Use Value: Replaces manually trimmed discrete supplies, achieving ±0.5% full-scale linearity without calibration drift over temperature. | Use Scenario: Biasing segmented APD arrays in portable NIR spectrometers requiring multi-channel synchronous bias control. IC Role / Device Role / Timing Role: Generates matched high-voltage rails across channels using shared EN/FB while isolating MON1/MON2 paths per detector. Use Value: Reduces inter-channel crosstalk and enables simultaneous multi-wavelength acquisition with consistent quantum efficiency. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar APD biasing and monitoring applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX3865EASA+ | 3.3V-only input; 80V max output; no integrated switch; requires external FET and compensation. | Limited to fixed 3.3V systems; lacks MON1/MON2 dual-ratio outputs; higher BOM cost and layout area. | Select when legacy 3.3V infrastructure exists and discrete control flexibility is required. |
| LT3482EDD | 60V max output; 1.2MHz switching; single APD monitor output (1:10 only); no RLIM-programmable limit. | Insufficient for 70–90V APDs in long-haul fiber; lacks secondary monitor for redundancy or differential sensing. | Select for cost-sensitive 40–60V APD applications where dual-monitoring is not needed. |
Compared with MAX3865EASA+ and LT3482EDD, the MP3430HQ-LF-Z uniquely integrates a 90V switch, dual-ratio APD monitors, and programmable over-current protection in a 3×3mm QFN-reducing solution size by >40% and eliminating external compensation in high-ratio boost designs.
Availability
MP3430HQ-LF-Z is available at Aetrix Electronics and suitable for fiber-optic transceivers, lidar receiver modules, precision optical sensors, and industrial spectrometers requiring stable component supply and RoHS-compliant packaging.
Supply support for MP3430HQ-LF-Z includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and power ICs, with core expertise in DC-DC conversion, LED drivers, and motor control.
The MP3430 product line targets high-voltage optical receiver subsystems, delivering integrated APD biasing and real-time current monitoring to simplify design of fiber-optic, lidar, and scientific instrumentation front-ends.
FAQ
What is the maximum safe APD voltage that MP3430HQ-LF-Z can deliver?
The MP3430HQ-LF-Z is rated for up to 90V output under normal operating conditions, with absolute maximum APD pin voltage specified at 100V. Operation above 90V risks violating recommended operating limits and may trigger thermal shutdown or reduce long-term reliability. Designers should maintain ≥10% headroom below 90V for worst-case line/load/temperature variation.
How does the RLIM pin set the APD over-current threshold?
The RLIM pin accepts a resistor to ground that programs the APD current limit between 0.36mA and 4.3mA. The relationship is approximately linear: IAPD,MAX ≈ (68 kΩ / RRLIM). For example, a 27.2kΩ resistor sets a 2.5mA limit. This direct analog programming avoids digital interfaces and supports field recalibration without firmware changes.
Can MON1 and MON2 be used simultaneously without interference?
Yes - MON1 and MON2 are independently buffered current-source outputs with separate internal mirror paths. They share the same APD current sense node but drive distinct external resistors (RMON1, RMON2) to generate isolated voltage signals. Layout best practice requires separate AGND returns and decoupling for each monitor path to preserve accuracy.
Why does MP3430HQ-LF-Z require discontinuous conduction mode (DCM)?
Due to its high voltage conversion ratio (e.g., 3.3V → 90V), the boost topology develops a right-half-plane zero that destabilizes the control loop in continuous conduction mode (CCM). DCM operation eliminates this zero, ensuring phase margin >45° across all input/output conditions without complex external compensation.
Is the exposed pad (EP) electrically connected internally?
Yes - the exposed pad is internally connected to PGND and must be soldered to a large copper pour on the PCB. It serves as the primary thermal and electrical ground path, contributing ~70% of total θJA reduction. Leaving it unconnected degrades thermal performance by >40% and increases switching noise coupling into analog monitor paths.
What is the purpose of the MONIN pin, and how should it be filtered?
MONIN supplies bias to the internal APD current mirrors and must be clean to avoid gain error. It should be decoupled with a π-filter: 10µF X7R ceramic + 1µH ferrite bead + 100nF ceramic, placed adjacent to the IC. Ripple on MONIN directly modulates monitor gain, so filtering reduces gain error from <±5% to <±2.5% under heavy load transients.
MP3430HQ-LF-Z Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Monolithic Power Systems Inc.
- Series:
- -
- Package/Case:
- 16-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Up
- Output Configuration:
- Positive
- Topology:
- Boost
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 2.7V
- Voltage - Input (Max):
- 5.5V
- Voltage - Output (Min/Fixed):
- 2.7V
- Voltage - Output (Max):
- 90V
- Current - Output:
- 600mA (Switch)
- Frequency - Switching:
- 1.3MHz
- Synchronous Rectifier:
- No
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-QFN (3x3)
MP3430HQ-LF-Z FAQ
1.How can I place an order for MP3430HQ-LF-Z through Aetrix?
Please submit a Request for Quotation (RFQ) for MP3430HQ-LF-Z on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MP3430HQ-LF-Z reliable?
The price and inventory of MP3430HQ-LF-Z are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MP3430HQ-LF-Z is usually 5 days.
3.What payment methods are accepted for MP3430HQ-LF-Z?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MP3430HQ-LF-Z transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MP3430HQ-LF-Z?
MP3430HQ-LF-Z orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MP3430HQ-LF-Z order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MP3430HQ-LF-Z?
For technical support, including MP3430HQ-LF-Z datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MP3430HQ-LF-Z requirements.
6.How does Aetrix verify that MP3430HQ-LF-Z is sourced from the original manufacturer or authorized distributors?
All MP3430HQ-LF-Z products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MP3430HQ-LF-Z meets industry standards.
7.What is the process for return or replacement of MP3430HQ-LF-Z?
All MP3430HQ-LF-Z units undergo pre-shipment inspection (PSI). If there is an issue with MP3430HQ-LF-Z, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MP3430HQ-LF-Z part is unused and in its original packaging.
Return procedure for MP3430HQ-LF-Z:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
MP3430HQ-LF-Z Tags

-
TPS562201DDCR
Texas Instruments

-
MC34063ABD-TR
STMicroelectronics

-
TPS561201DDCR
Texas Instruments

-
MC33063ADR
Texas Instruments

-
MC34063ADR
Texas Instruments
-
TPS560200DBVR
Texas Instruments

-
AP3012KTR-G1
Diodes Incorporated

-
TLV61048DBVR
Texas Instruments

-
AZ34063UMTR-G1
Diodes Incorporated

-
TPS562200DDCR
Texas Instruments

-
AP62300TWU-7
Diodes Incorporated

-
MC34063EBD-TR
STMicroelectronics
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

