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Monolithic Power Systems Inc. MP38873DL-LF-P
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- Part No.:
- MP38873DL-LF-P
- Manufacturer:
- Monolithic Power Systems Inc.
- Package:
- 20-PowerVFQFN
- Datasheet:
-
MP38873DL-LF-P.pdf
- Description:
- IC REG BUCK ADJ 15A 20QFN
- Quantity:
- Payment:
- Shipping:
Inventory:2,503
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Product details
Overview
MP38873DL-LF-P from Monolithic Power Systems is a monolithic synchronous step-down DC-DC converter with integrated 25mΩ high-side MOSFET and external gate driver for low-side N-channel MOSFETs. It delivers 15A continuous output current, supports 4.5V–16V input, regulates output from 0.8V to 12V, and operates at fixed 400kHz or externally synchronized up to 1MHz. It is used in space-constrained PCBs requiring high-current pre-regulation, such as server VRMs and telecom power modules.
For engineers reviewing the MP38873DL-LF-P datasheet, MP38873DL-LF-P pinout, MP38873DL-LF-P application, or MP38873DL-LF-P equivalent, key selection criteria include its 15A output capability, synchronous gate driver interface (GATE pin), phase-shift synchronization (SYNCIN/SYNCOUT), programmable soft-start (SS/TRK), and power-good signaling (PG) for multi-rail sequencing.
Technical Context
The MP38873DL-LF-P employs peak current-mode control with a fixed 400kHz oscillator or external synchronization from 300kHz to >1MHz. Its internal error amplifier compares FB voltage against a 0.810V reference (±2% accuracy) and drives the COMP node to regulate duty cycle via current-sense feedback.
It integrates a 5V internal VCC regulator powered from VIN, supports startup tracking via SS/TRK, provides cycle-by-cycle overcurrent protection triggered at 21A, and features thermal shutdown at 150°C with hysteresis. The bootstrap circuit (BST pin) enables high-side gate drive, while GATE pin delivers sourced/sunk gate current with 4Ω source / 1Ω sink impedance.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 4.5V to 16V - Supports wide industrial and telecom input rails without pre-regulation. |
| Output Current | 15A continuous - Enables single-chip solutions for high-power FPGA or ASIC core rails. |
| Switching Frequency | 400kHz fixed or 300kHz–1MHz sync - Allows EMI tuning and interleaved multi-phase operation. |
| Feedback Accuracy | ±2% at 0.810V - Ensures tight regulation for sensitive digital loads like CPUs and GPUs. |
| Internal High-Side RDS(on) | 25mΩ - Minimizes conduction loss at full load, improving efficiency above 90% at 12V→1.2V/10A. |
| Gate Driver Output | GATE pin with 4Ω source / 1Ω sink - Drives external low-side MOSFETs with fast turn-on/turn-off and 10ns non-overlap timing. |
| Power Good Threshold | Ramp-up at 90%, ramp-down at 85% of nominal VOUT - Provides reliable rail sequencing and fault detection. |
Pinout & Package
MP38873DL-LF-P is housed in a thermally enhanced 20-pin 3mm × 4mm QFN package with exposed thermal pad (pins 10 and 18 + EP). Pin functions are validated per MPS MP38873 Rev. 0.9 datasheet.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC (Pin 1) | Bias supply for bottom gate driver | Requires 1µF ceramic decoupling; powers internal 5V regulator and gate driver logic. |
| SYNCOUT (Pin 2) | Timing output for multi-phase sync | 180° out-of-phase 50% duty cycle signal to synchronize slave regulators in interleaved operation. |
| SYNCIN (Pin 3) | External clock input | Accepts 300kHz–1MHz TTL/CMOS clock; overrides internal oscillator for EMI reduction or phase alignment. |
| EN (Pin 4) | Enable control input | Active-high logic; 2V threshold ensures noise immunity; enables power sequencing with other rails. |
| SS/TRK (Pin 5) | Soft-start and voltage tracking input | Charges external capacitor to control startup slew rate or track another regulator's output during ramp-up. |
| FB (Pin 6) | Feedback input | Connects to resistor divider; senses output voltage against 0.810V reference for closed-loop regulation. |
| COMP (Pin 7) | Error amplifier output | Drives external RC compensation network; sets loop stability, transient response, and phase margin. |
| PG (Pin 8) | Power good open-drain output | Signals valid regulation (within ±10%) after 20µs delay; requires 100kΩ pull-up to VOUT or VCC. |
| BST (Pin 9) | Bootstrap supply for high-side driver | Connected between SW and BST; forms floating supply to drive internal high-side MOSFET gate above VIN. |
| VIN (Pins 10, 18, EP) | Main input power supply | High-current input path; exposed pad and multiple pins reduce thermal resistance (θJA = 48°C/W). |
| SW (Pins 11–17) | Switch node output | Fused together for low-inductance connection to external inductor and bootstrap capacitor. |
| GATE (Pin 19) | Low-side MOSFET gate driver output | Drives external N-channel MOSFET; includes non-overlap logic (10ns dead time) to prevent shoot-through. |
| GND (Pin 20) | Analog and power ground reference | Single-point return for feedback, compensation, and internal bias; must be tied to thermal pad. |
Key Features
| Feature | Design Value |
|---|---|
| Synchronous gate driver with non-overlap timing | 10ns dead time (Td1/Td2) prevents shoot-through in external low-side MOSFET, enabling >92% efficiency at 15A. |
| Phase-shift synchronization interface | SYNCIN/SYNCOUT pins support two-phase interleaving with automatic current balancing when COMP pins are tied. |
| Programmable soft-start and tracking | SS/TRK pin accepts external capacitor or voltage reference to control ramp rate or match another rail's startup profile. |
| Robust fault protection | Cycle-by-cycle current limiting (21A trip), thermal shutdown (150°C), and UVLO (4.1V rising threshold) ensure system reliability. |
| Stable with ceramic output capacitors | Compensation architecture optimized for low-ESR ceramics, eliminating need for bulk electrolytics in compact designs. |
Applications
| Server Core Voltage Regulation | Telecom Base Station Pre-Regulator |
|---|---|
|
Use Scenario: Delivering 1.2V/15A to high-performance CPU or FPGA in 1U server blade with strict board area limits. IC Role / Device Role / Timing Role: Primary step-down regulator with integrated high-side switch and external synchronous rectification. Use Value: Eliminates discrete high-side MOSFET and driver IC, reducing BOM count by 4 components and footprint by >30% vs. controller+discrete solution. |
Use Scenario: Generating 5V/12A intermediate bus from 48V telecom supply in distributed power architecture. IC Role / Device Role / Timing Role: Pre-regulator feeding downstream point-of-load converters; synchronized to system clock via SYNCIN. Use Value: 400kHz fixed frequency minimizes filter size; SYNCOUT enables interleaving with second MP38873 to halve input ripple current. |
| Industrial PLC I/O Module Power | Automotive ADAS Domain Controller Supply |
|
Use Scenario: Providing isolated 3.3V/10A rail for microcontroller and communication interfaces in harsh factory environments. IC Role / Device Role / Timing Role: Main DC-DC converter with EN-controlled sequencing and PG-monitored startup. Use Value: -40°C to +85°C operating range and thermal shutdown ensure reliability; PG signal validates rail before firmware initialization. |
Use Scenario: Supplying 1.8V/8A core voltage to radar processor in automotive domain controller with strict EMI requirements. IC Role / Device Role / Timing Role: Synchronized switching regulator operating at 800kHz to avoid AM radio band; uses external BST diode for efficiency. Use Value: External clock sync allows precise frequency placement; soft-start prevents inrush into large processor decoupling banks. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-current synchronous buck regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MP8770GQ-Z | 12A rated, 2.5V–18V input, integrated dual MOSFETs, no external GATE driver | Lacks synchronous gate driver; unsuitable where external low-side FET optimization is required | Select MP38873DL-LF-P when external MOSFET selection (e.g., Si7336ADP) is needed for thermal or efficiency tailoring. |
| LM27402SQX/NOPB | 15A controller-only, requires external high-/low-side drivers and MOSFETs, 0.6V ref | Higher BOM count and layout complexity; supports higher VIN (up to 28V) | Select MP38873DL-LF-P when integration, reduced footprint, and simplified design outweigh need for >16V input. |
Compared with MP8770GQ-Z, MP38873DL-LF-P offers higher current rating and gate driver flexibility; compared with LM27402SQX/NOPB, it reduces component count and layout risk but trades off input voltage headroom and discrete FET optimization.
Availability
MP38873DL-LF-P is available at Aetrix Electronics and suitable for server power supplies, telecom pre-regulators, industrial PLCs, and automotive ADAS domain controllers requiring stable component supply across long production lifecycles.
Supply support for MP38873DL-LF-P includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and power ICs, founded in 1997 and headquartered in Kirkland, Washington.
The MP38873 belongs to MPS's high-current synchronous buck regulator product line, designed specifically for space-constrained, high-efficiency DC-DC conversion in computing, communications, and industrial systems where integration, thermal performance, and multi-phase scalability are critical.
FAQ
What is the maximum supported switching frequency when using external synchronization?
The MP38873DL-LF-P accepts external clock signals from 300kHz to greater than 1MHz on the SYNCIN pin. Operation above 1MHz is not guaranteed per datasheet specifications; stable synchronization is confirmed up to 1MHz with TTL/CMOS-compatible input levels (VIH ≥ 2V, VIL ≤ 0.4V) and <10ns pulse width tolerance.
Can the MP38873DL-LF-P operate without an external low-side MOSFET?
No. The MP38873DL-LF-P integrates only a high-side power MOSFET (25mΩ RDS(on)). The GATE pin is mandatory for driving an external N-channel low-side MOSFET; operation with a Schottky diode is not supported and will cause functional failure due to lack of synchronous rectification control.
How is power sequencing implemented using EN and PG pins?
EN enables the device (logic-high threshold = 2V); PG provides open-drain status indicating output regulation (active-high when VOUT is within ±10% of setpoint, with 20µs delay). Sequencing is achieved by cascading EN of downstream regulators to PG of upstream MP38873DL-LF-P via pull-up and RC delay networks.
What is the purpose of the SS/TRK pin, and how does it differ from standard soft-start?
The SS/TRK pin supports both soft-start (via external capacitor to GND) and voltage tracking (via resistive divider from another rail). Unlike basic soft-start, tracking allows the MP38873DL-LF-P output to ramp in proportion to a master supply-critical for DDR memory or multi-core SoC power domains requiring monotonic voltage alignment.
Is the exposed thermal pad (EP) electrically connected to GND?
Yes. The exposed pad (pins 10, 18, and EP) is internally connected to GND and must be soldered to a PCB thermal plane. It serves as the primary thermal and electrical return path; omitting this connection causes thermal runaway and violates absolute maximum ratings (θJA = 48°C/W assumes proper pad thermal coupling).
Does the MP38873DL-LF-P support output voltages below 0.8V?
No. The internal reference is fixed at 0.810V (±2%), and the FB pin is designed for resistor-divider feedback scaling. Output voltages below 0.8V cannot be regulated stably; the minimum valid output is 0.8V, as confirmed by the "Output Adjustable from 0.8V to 12V" specification and feedback equation VOUT = 0.81 × (1 + R1/R2).
What happens during thermal shutdown, and how does recovery work?
When junction temperature exceeds 150°C, the device shuts down all switching and gate drive functions. Recovery occurs automatically when die temperature falls below ~140°C (10°C hysteresis), restoring normal operation without requiring EN toggle or power cycle-enabling graceful thermal throttling in sustained overload conditions.
MP38873DL-LF-P Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Monolithic Power Systems Inc.
- Series:
- -
- Package/Case:
- 20-PowerVFQFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 4.5V
- Voltage - Input (Max):
- 16V
- Voltage - Output (Min/Fixed):
- 0.8V
- Voltage - Output (Max):
- 12V
- Current - Output:
- 15A
- Frequency - Switching:
- 400kHz
- Synchronous Rectifier:
- No
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 20-QFN (3x4)
MP38873DL-LF-P FAQ
1.How can I place an order for MP38873DL-LF-P through Aetrix?
Please submit a Request for Quotation (RFQ) for MP38873DL-LF-P on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MP38873DL-LF-P reliable?
The price and inventory of MP38873DL-LF-P are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MP38873DL-LF-P is usually 5 days.
3.What payment methods are accepted for MP38873DL-LF-P?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MP38873DL-LF-P transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MP38873DL-LF-P?
MP38873DL-LF-P orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MP38873DL-LF-P order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MP38873DL-LF-P?
For technical support, including MP38873DL-LF-P datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MP38873DL-LF-P requirements.
6.How does Aetrix verify that MP38873DL-LF-P is sourced from the original manufacturer or authorized distributors?
All MP38873DL-LF-P products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MP38873DL-LF-P meets industry standards.
7.What is the process for return or replacement of MP38873DL-LF-P?
All MP38873DL-LF-P units undergo pre-shipment inspection (PSI). If there is an issue with MP38873DL-LF-P, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MP38873DL-LF-P part is unused and in its original packaging.
Return procedure for MP38873DL-LF-P:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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