Monolithic Power Systems Inc. MP38900DL-B-LF-Z
- Part No.:
- MP38900DL-B-LF-Z
- Manufacturer:
- Monolithic Power Systems Inc.
- Package:
- 20-VFQFN Exposed Pad
- Datasheet:
-
MP38900DL-B-LF-Z.pdf
- Description:
- IC REG BUCK ADJ 10A 20QFN
- Quantity:
- Payment:

- Shipping:

Inventory:2,605
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Product details
Overview
MP38900DL-B-LF-Z from Monolithic Power Systems is a high-efficiency, fast-transient, 10A synchronous step-down DC/DC converter in a QFN20 (3×4 mm) package. It integrates 27 mΩ high-side and 10 mΩ low-side MOSFETs, operates from 4.5 V to 16 V input, delivers adjustable output from 0.8 V to 13 V, and uses Constant-On-Time (COT) control for rapid load-step response - deployed in notebook I/O power rails and optical communication POL systems.
For engineers reviewing the MP38900DL-B-LF-Z datasheet, MP38900DL-B-LF-Z pinout, MP38900DL-B-LF-Z application, or MP38900DL-B-LF-Z equivalent, key selection criteria include its built-in 5 V VCC regulator, hiccup-mode overcurrent protection, high-Z shutdown behavior, and thermal shutdown with 25 °C hysteresis - all critical for reliable point-of-load regulation in space-constrained industrial and telecom designs.
Technical Context
The MP38900DL-B-LF-Z implements Constant-On-Time (COT) control with line feed-forward via the FREQ pin, enabling stable operation across wide VIN ranges without external compensation. Its internal 5 V VCC regulator eliminates need for external bias supply, distinguishing it from the MP38900 variant.
It features cycle-by-cycle current limiting with hiccup-mode OCP recovery, 0.815 V ±10 mV feedback reference, and open-drain PGOOD with fixed 1.5 ms delay - all coordinated through an integrated thermal shutdown circuit (150 °C trip, 125 °C restart).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 4.5 V to 16 V - supports 5 V, 12 V, and 15 V intermediate bus architectures without derating. |
| Continuous Output Current | 10 A - enables single-chip power delivery for FPGA core or ASIC I/O rails. |
| Feedback Reference Voltage | 815 mV ±8 mV - sets output accuracy to ±1% at typical conditions, enabling precise 1.05 V or 1.2 V CPU core supplies. |
| Switching MOSFETs | 27 mΩ HS / 10 mΩ LS - reduces conduction loss and improves full-load efficiency beyond 92% at 12 VIN/1.2 VOUT. |
| Protection Features | SCP, OCP (hiccup), OVP (1.25×VFB), UVP (0.7×VFB), thermal shutdown - ensures autonomous fault recovery without system-level intervention. |
| Shutdown Mode | High-Z EN - allows output prebiasing and prevents backfeed during partial system power-down. |
| Thermal Shutdown Threshold | 150 °C with 25 °C hysteresis - enables safe re-start after junction cooling to 125 °C, avoiding latch-up in thermally constrained enclosures. |
Pinout & Package
MP38900DL-B-LF-Z is housed in a thermally enhanced QFN20 (3 mm × 4 mm, 0.5 mm pitch) package with exposed thermal pad (Pin 11–16 PGND). The layout prioritizes low-inductance power paths: IN (Pins 8,19), SW (Pins 9,10,17,18), and PGND (Pins 11–16) occupy perimeter pads; AGND (Pin 1) and FB (Pin 3) are isolated for noise-sensitive analog routing.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 AGND | Analog Ground | Reference for FB, SS, and internal error amplifier - must be star-connected to PGND near FB resistor divider. |
| 2 FREQ | Frequency Set Input | Resistor-to-IN connection sets CCM switching frequency; enables line feed-forward for improved transient immunity. |
| 3 FB | Feedback Input | Monitors output via resistive divider; 815 mV reference enables 0.8–13 V output programming with <±1% tolerance. |
| 4 SS | Soft-Start Control | 8.5 µA charge/discharge current sets ramp time; MP38900-B pulls low immediately on EN deassertion for prebias compatibility. |
| 5 EN | Enable Input | 1.05–1.6 V threshold with 420 mV hysteresis; internal 1 MΩ pull-down enables automatic start via 100 kΩ to IN. |
| 6 PGOOD | Power-Good Output | Open-drain signal asserts high after 1.5 ms when VFB ≥ 90% VREF; used for sequencing or system reset coordination. |
| 7 BST | Bootstrap Supply | Connects 1 µF ceramic capacitor between BST and SW to sustain high-side gate drive above VIN during switching. |
| 8,19 IN | Main Input Supply | Accepts 4.5–16 V; requires local 10 µF+ ceramic decoupling; wide traces/vias minimize voltage drop and EMI. |
| 9,10,17,18 SW | Power Switch Node | Drives external inductor; shared high-current path demands copper fill and multiple vias to PGND for thermal and EMI control. |
| 11–16 PGND | Power Ground | Primary return for HS/LS FETs and inductor; must be solid plane connected directly to thermal pad for θJA = 48 °C/W. |
| 20 VCC | Internal Bias Supply | 5 V regulated output powers internal logic and gate drivers; requires 1 µF ceramic decoupling adjacent to pin. |
Key Features
| Feature | Design Value |
|---|---|
| Proprietary switching loss reduction | Optimizes dead-time and gate drive timing to suppress shoot-through and reduce switching losses at 500 kHz–2 MHz. |
| Programmable soft start | SS capacitor value directly sets ramp time (e.g., 47 nF → ~5.8 ms), preventing inrush current into large output capacitors. |
| Constant-On-Time (COT) control | Delivers <10 µs load-step response with no loop compensation required - ideal for dynamic FPGA or DSP core loads. |
| Integrated VCC regulator | Eliminates external 5 V bias rail, reducing BOM count and PCB area while maintaining gate drive strength across input range. |
| Hiccup-mode overcurrent protection | Auto-restarts after fault clearance - avoids system lockup during intermittent short circuits in distributed POL networks. |
Applications
| Server VR12 Core Power | Optical Transceiver Module |
|---|---|
Use Scenario: Supplies 1.05 V @ 8 A to FPGA-based packet processing ASIC in 1U server blade. IC Role / Device Role / Timing Role: Primary synchronous buck regulator delivering tightly regulated core voltage with <±1% accuracy and <10 µs transient recovery. Use Value: Integrated 27 mΩ/10 mΩ MOSFETs and COT control maintain >91% efficiency at 50% load while minimizing thermal footprint in air-cooled chassis. |
Use Scenario: Powers 3.3 V laser driver and 1.2 V DSP in SFP+ pluggable transceiver operating at -40°C to +85°C. IC Role / Device Role / Timing Role: Point-of-load converter with hiccup-mode OCP and thermal shutdown ensuring uninterrupted link operation during hot-swap events. Use Value: High-Z shutdown preserves prebiased output during hot-plug insertion; 150°C thermal shutdown prevents damage under sustained overload in sealed module housing. |
| Industrial PLC I/O Backplane | Networking Switch ASIC I/O Rail |
Use Scenario: Generates 5 V @ 6 A for isolated digital I/O modules in DIN-rail mounted programmable logic controller. IC Role / Device Role / Timing Role: Main DC/DC stage converting 24 V field bus to 5 V logic rail, with robust UVLO (3.8 V) and ESD-hardened pins. Use Value: Wide 4.5–16 V input range accommodates brownout conditions; built-in OVP/UVP protects downstream isolators and level shifters from rail faults. |
Use Scenario: Delivers 1.8 V @ 10 A to multi-core network processor in Layer 3 enterprise switch line card. IC Role / Device Role / Timing Role: High-current POL regulator with PGOOD sequencing and programmable frequency to avoid noise coupling into SerDes lanes. Use Value: Fixed 1.5 ms PGOOD delay enables deterministic power-up sequence; QFN20 (3×4 mm) footprint saves >30% board area vs. older SO-8 solutions. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous step-down converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MPQ38900-AF-P | Automotive-grade (AEC-Q100), same pinout and electrical specs, but rated for –40°C to +150°C junction and qualified for automotive power domains. | Required for ADAS domain controllers or infotainment head units needing automotive qualification. | Select MPQ38900-AF-P only if AEC-Q100 Grade 1 compliance and extended temperature operation are mandatory. |
| MP2315GJ-Z | Lower 6 A rating, 3.3–18 V input, no integrated VCC - requires external 5 V bias; smaller QFN12 (2×2 mm) package. | Suitable for cost-sensitive, lower-power edge nodes where board space is more constrained than current demand. | Choose MP2315GJ-Z only when output current ≤6 A and external VCC is acceptable to reduce solution size and cost. |
Compared with MP38900DL-B-LF-Z, MPQ38900-AF-P adds automotive qualification at identical performance and footprint, while MP2315GJ-Z trades current capability and integrated bias for smaller size and lower cost - making the MP38900DL-B-LF-Z optimal for industrial/commercial 10 A POL where reliability and integration are prioritized.
Availability
MP38900DL-B-LF-Z is available at Aetrix Electronics and suitable for notebook I/O power, optical transceiver modules, and networking switch ASIC rails requiring stable component supply amid end-of-life transitions.
Supply support for MP38900DL-B-LF-Z includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and power ICs, with design centers in the US, China, and Taiwan.
The MP38900 series belongs to MPS's high-current synchronous buck converter product line, engineered specifically for compact, high-efficiency point-of-load regulation in computing, telecom, and industrial equipment.
FAQ
What is the function of the FREQ pin, and how is switching frequency set?
The FREQ pin sets the CCM switching frequency by connecting a resistor between FREQ and IN. Using Equation (3) from the datasheet, a 250 kΩ resistor yields ~500 kHz at 12 VIN/1.2 VOUT. This resistor also provides line feed-forward, improving transient response and reducing output voltage deviation during input line changes.
How does the MP38900DL-B-LF-Z handle output prebiasing during startup?
MP38900DL-B-LF-Z supports output prebiasing via its high-Z shutdown mode: when EN is low, the internal MOSFETs are fully disabled and the output remains floating, allowing external voltage to be present without reverse current or damage. This is essential for hot-swap and redundant power applications.
What is the difference between MP38900 and MP38900-B regarding VCC and shutdown behavior?
MP38900 requires an external 5 V VCC supply and features soft shutdown (controlled discharge of SS capacitor), while MP38900-B integrates the VCC regulator and uses high-Z shutdown (instant SS discharge). This makes MP38900-B compatible with prebiased outputs and eliminates the need for an auxiliary bias rail.
Can the MP38900DL-B-LF-Z operate with ceramic output capacitors only?
Yes, but external ramp compensation (R4/C4) is required on the FB pin to ensure stability with low-ESR ceramics. The ramp slope must satisfy Equation (8) in the datasheet; typical values are R4 = 100 kΩ and C4 = 100 pF for 12 VIN/1.2 VOUT, verified via load-step testing and phase margin measurement.
What thermal performance can be expected in a standard 4-layer PCB layout?
With JEDEC-standard 4-layer board (2 oz copper, 1 in² thermal pad exposure), θJA is 48 °C/W. At 10 A/1.2 V output and 12 V input, typical power dissipation is ~1.8 W, resulting in ~86 °C junction rise above ambient - well within the 125 °C max continuous operating limit, assuming 25 °C ambient.
How does the hiccup-mode OCP behave during sustained overload?
Upon detecting overcurrent for >40 µs per cycle, MP38900DL-B-LF-Z enters hiccup mode: it shuts down for ~20 ms, then attempts restart. If fault persists, it repeats the cycle. This limits average power dissipation to <0.5 W during fault, preventing thermal runaway while enabling autonomous recovery once load normalizes.
Is the MP38900DL-B-LF-Z RoHS-compliant and lead-free?
Yes - the "-LF" suffix denotes lead-free, RoHS-compliant packaging. The device meets EU RoHS Directive 2011/65/EU and is green-status qualified per MPS Quality Assurance documentation, with homogeneous material analysis confirming Pb content <1000 ppm.
MP38900DL-B-LF-Z Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Monolithic Power Systems Inc.
- Series:
- -
- Package/Case:
- 20-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 4.5V
- Voltage - Input (Max):
- 16V
- Voltage - Output (Min/Fixed):
- 0.8V
- Voltage - Output (Max):
- 13V
- Current - Output:
- 10A
- Frequency - Switching:
- -
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 20-QFN (3x4)
MP38900DL-B-LF-Z FAQ
1.How can I place an order for MP38900DL-B-LF-Z through Aetrix?
Please submit a Request for Quotation (RFQ) for MP38900DL-B-LF-Z on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MP38900DL-B-LF-Z reliable?
The price and inventory of MP38900DL-B-LF-Z are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MP38900DL-B-LF-Z is usually 5 days.
3.What payment methods are accepted for MP38900DL-B-LF-Z?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MP38900DL-B-LF-Z transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MP38900DL-B-LF-Z?
MP38900DL-B-LF-Z orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MP38900DL-B-LF-Z order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MP38900DL-B-LF-Z?
For technical support, including MP38900DL-B-LF-Z datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MP38900DL-B-LF-Z requirements.
6.How does Aetrix verify that MP38900DL-B-LF-Z is sourced from the original manufacturer or authorized distributors?
All MP38900DL-B-LF-Z products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MP38900DL-B-LF-Z meets industry standards.
7.What is the process for return or replacement of MP38900DL-B-LF-Z?
All MP38900DL-B-LF-Z units undergo pre-shipment inspection (PSI). If there is an issue with MP38900DL-B-LF-Z, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MP38900DL-B-LF-Z part is unused and in its original packaging.
Return procedure for MP38900DL-B-LF-Z:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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