Monolithic Power Systems Inc. MP3910AGS-P

Overview

MP3910AGS-P from Monolithic Power Systems is a peak current mode PWM controller for external N-channel MOSFETs in flyback, boost, and SEPIC topologies. It delivers 1A gate drive, supports 30–400kHz programmable switching frequency, features pulse-skipping light-load operation, and integrates cycle-by-cycle current limiting, hiccup-mode OLP/OVP/SCP, and external soft-start-enabling high-efficiency isolated telecom power supplies and PoE PDs.

For engineers reviewing the MP3910AGS-P datasheet, MP3910AGS-P pinout, MP3910AGS-P application, or MP3910AGS-P equivalent, key selection criteria include its SOIC-8 package compatibility, 9–14V VCC range, 185mV current-sense threshold, 0.95V pulse-skip trigger, and dual feedback mode (FB or COMP) auto-detection via ISENSE pin voltage.

Technical Context

The MP3910AGS-P implements a fixed-frequency, peak current mode control architecture with integrated slope compensation and a 1A totem-pole gate driver optimized for standard-threshold N-MOSFETs. Its error amplifier transconductance is 0.56mA/V, and COMP pin output current is limited to ±75μA, supporting stable loop compensation across isolated and non-isolated configurations.

Feedback topology is dynamically selected at startup by applying a 55μA, 180μs current pulse to ISENSE: if reflected voltage exceeds 185mV, internal error amplifier disables and COMP becomes direct optocoupler input; otherwise, FB pin connects to internal EA and COMP serves as EA output requiring RC compensation.

Key Specifications

Pinout & Package

MP3910AGS-P is housed in a standard SOIC-8 package with exposed pad (thermal pad not electrically connected), compliant with JEDEC MS-012AC, and rated for θ_JA = 90°C/W on 4-layer PCB.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar peak current mode PWM controller applications.

Compared with UCC28C43DR and NCP1252ADR2G, MP3910AGS-P provides wider frequency tuning, higher gate drive, integrated slope compensation, and intelligent topology detection-making it optimal for new designs requiring efficiency across load range and support for both isolated and non-isolated topologies.

Availability

MP3910AGS-P is available at Aetrix Electronics and suitable for telecom power supplies, PoE powered devices, and industrial brick modules requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.

Supply support for MP3910AGS-P includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and power ICs, with design centers in the US, China, and Taiwan, and global manufacturing partnerships.

The MP3910A belongs to MPS's high-voltage PWM controller product line, engineered specifically for flexible, efficient, and robust primary-side regulation in isolated and non-isolated DC-DC converters targeting telecom, industrial, and PoE applications.

FAQ

What is the minimum recommended RT resistor value for stable operation?

The MP3910AGS-P datasheet specifies a maximum switching frequency of 500kHz, corresponding to an RT value near 4.7kΩ. For noise immunity and reliable startup, MPS recommends RT ≥ 2.2kΩ. Lower values increase susceptibility to RT pin coupling and may cause jitter or frequency drift under EMI stress.

How does the ISENSE pin determine isolated vs. non-isolated mode?

At power-up, the MP3910AGS-P applies a 55μA, 180μs current pulse to ISENSE. If the resulting voltage exceeds 185mV, it disables the internal error amplifier and enables COMP as direct optocoupler input. If voltage remains below 185mV, it enables the FB-to-COMP amplifier and disables the COMP pull-up, routing feedback through FB.

Can MP3910AGS-P operate with VCC below 9V?

No. The device has a guaranteed 9V minimum operating VCC per datasheet specifications. Below 9V, UVLO remains active (rising threshold = 8V), preventing internal circuitry enablement. Operation below 9V risks erratic behavior, missing pulses, or failure to initiate soft-start.

What is the purpose of the 500ns TOVPS blanking time in OVP detection?

The 500ns TOVPS (Time-Out for Voltage Protection Sampling) blanking window suppresses false OVP triggers caused by ringing from transformer leakage inductance and parasitic capacitance during switch transitions. It ensures OVP sampling occurs only during stable auxiliary winding voltage plateaus.

Does MP3910AGS-P support discontinuous conduction mode (DCM) operation?

Yes. The peak current mode architecture and programmable frequency allow stable DCM operation across flyback and boost topologies. Pulse-skipping mode inherently engages in DCM at light loads, and the 185mV current limit threshold ensures accurate cycle-by-cycle control even with variable off-times.

Is the SOIC-8 package thermally enhanced?

The MP3910AGS-P uses standard SOIC-8 (MS-012AC) without an exposed thermal pad. Its θ_JA is specified as 90°C/W on a 4-layer PCB per JESD51-7. For high-power applications, thermal relief via copper pour under pins 1, 4, 5, and 8-and minimizing trace length to GND-is essential to maintain T_J ≤125°C.

How is hiccup-mode OLP recovery timed?

After OLP detection, the SS capacitor discharges at 17.8μA until reaching 2.9V (registering overload), then switches to 1.66μA discharge. Recovery begins only after SS reaches 0.2V, initiating a full soft-start cycle. Total hiccup period depends on SS capacitor value and is typically 100–500ms for common 100nF designs.