Monolithic Power Systems Inc. MP4054AGJ-P

Overview

MP4054AGJ-P from Monolithic Power Systems is a primary-side-control, offline LED controller in TSOT23-8 package, integrating active PFC, valley switching, NTC thermal fold-back, and PWM dimming. It delivers <2% line/load regulation, ≥0.9 power factor across universal input (90–264VAC), and accurate real-current control for isolated flyback LED drivers delivering 350mA at 20V output.

For engineers reviewing the MP4054AGJ-P datasheet, MP4054AGJ-P pinout, MP4054AGJ-P application, or MP4054AGJ-P equivalent, this device is selected for cost-sensitive, safety-compliant AC/DC LED lighting where secondary-side feedback elimination, thermal derating, and analog/digital dimming coexistence are required.

Technical Context

The MP4054AGJ-P implements proprietary real-current control using primary-side sensing via CS/ZCD, eliminating optocouplers and secondary shunt regulators. Its multiplier-based PFC circuit accepts a half-wave rectified line signal at MULT to shape input current sinusoidally, achieving ≥0.9 PF without auxiliary PFC controllers.

Valley-switching operation is triggered by dual zero-crossing detection on CS/ZCD, reducing MOSFET turn-on loss and diode reverse-recovery noise. The IC embeds brown-out protection with 42ms detection delay and 100mV hysteresis, plus auto-restart timing (190µs) to sustain operation during ZCD signal dropout.

Key Specifications

Pinout & Package

MP4054AGJ-P is housed in a thermally enhanced TSOT23-8 package (2.9mm × 1.6mm × 0.85mm), optimized for high-density LED driver PCB layouts with exposed pad for improved heat dissipation.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar primary-side LED controller applications.

Compared with MP4054AGJ-P, MP4056AGJ-Z adds integrated bias regulation but removes NTC flexibility, while BP57728E trades valley switching and dimming capability for lower unit cost - making MP4054AGJ-P optimal for thermally demanding, dimmable commercial fixtures requiring high PF and minimal component count.

Availability

MP4054AGJ-P is available at Aetrix Electronics and suitable for commercial downlights, industrial high-bay fixtures, residential smart bulbs, and outdoor streetlight sub-drivers requiring stable component supply, long-lifecycle assurance, and RoHS-compliant sourcing.

Supply support for MP4054AGJ-P includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and power ICs, with design centers in the US, China, and Taiwan, and global manufacturing partnerships.

The MP4054A product line targets cost-sensitive, safety-critical AC/DC LED lighting systems requiring primary-side regulation, integrated PFC, and multi-mode protection - enabling compact, reliable, and standards-compliant driver designs.

FAQ

What is the minimum recommended bulk capacitor value for VCC in MP4054AGJ-P?

The datasheet specifies a typical 4.7µF electrolytic capacitor for VCC bypassing. This value ensures sufficient energy storage to sustain operation during brown-out events and provides low-impedance path for gate drive transients. Using <2.2µF risks startup failure or erratic behavior under low-line conditions due to insufficient hold-up time.

Can MP4054AGJ-P operate in non-isolated buck-boost topology?

Yes - the MP4054AGJ-P supports non-isolated low-side and high-side buck-boost configurations. In low-side mode, it replaces the transformer with a tapped inductor to maintain PFC performance; in high-side mode, the FB pin enables direct LED current sensing for tighter regulation, though layout noise immunity becomes critical.

How does the NTC pin support both thermal protection and PWM dimming simultaneously?

The NTC pin uses the same internal comparator thresholds for both functions: NTC voltage below 0.39V triggers thermal fold-back, while externally applied PWM signal above 1.23V (high) and below 0.39V (low) modulates the EA reference voltage. A ceramic capacitor (2.2–4.7nF) is required for thermal mode but omitted for PWM dimming to preserve signal edge integrity.

What is the purpose of the 10pF capacitor recommended on CS/ZCD?

The 10pF capacitor from CS/ZCD to GND suppresses high-frequency ringing caused by transformer leakage inductance and MOSFET parasitics. Without it, false zero-crossing detection or premature OCP triggering may occur, leading to unstable switching frequency or reduced efficiency in valley-switching operation.

Does MP4054AGJ-P require an external compensation network on COMP?

Yes - the COMP pin requires an external RC network (typically 1–10nF capacitor + 10–100kΩ resistor) to stabilize the current regulation loop. The network sets dominant pole and phase margin; omitting it causes oscillation or slow transient response, especially under PWM dimming or line-step conditions.

What is the maximum allowable switching frequency limitation in MP4054AGJ-P?

The IC enforces a minimum off-time of 5.5µs, limiting maximum switching frequency to approximately 182kHz under worst-case conditions. This constraint reduces EMI emissions and prevents core saturation in high-frequency flyback designs, particularly at low input voltages where duty cycle increases.

How is output over-voltage protection implemented without direct output sensing?

OVP uses the auxiliary winding voltage reflected through the CS/ZCD pin. When ZCD voltage exceeds 5.1V after 1.6µs blanking (for VMULT_O > 0.3V), the latch disables gate drive until VCC drops below UVLO. This indirect method avoids secondary-side components while maintaining ±5% OVP accuracy across line and load variations.