Monolithic Power Systems Inc. MP4060GK-P

Overview

MP4060GK-P from Monolithic Power Systems is a TRIAC-dimmable, primary-side control LED controller optimized for 200–265VAC input, delivering PFC and boundary-conduction-mode operation with integrated thermal foldback, active bleeder control (BD pin), and warm-sunset dimming via DIM pin. It enables single-stage AC/DC LED drivers up to 50W with deep dimming range and >0.9 PF.

For engineers reviewing the MP4060GK-P datasheet, MP4060GK-P pinout, MP4060GK-P application, or MP4060GK-P equivalent, key selection criteria include its adaptive leading/trailing-edge dimmer detection (tLD = 86–134 µs, tTL = 388–602 µs), real-current control architecture, SOIC-8/MSOP-10 package options, and integrated 30V/250mΩ internal MOSFET for low-side switching.

Technical Context

The MP4060GK-P implements real-current control using primary-side sensing-deriving LED output current from VREF (0.414 V), turn ratio N, and sense resistor RS-eliminating secondary-side feedback. Its multiplier (MULT) input accepts rectified line voltage to generate a sinusoidal current reference, enabling high power factor (>0.9) and low THD.

Boundary-conduction mode (BCM) operation is enforced via zero-current detection (ZCD) with programmable blanking (tZCD_LEB = 0.95–3.36 µs), minimizing switching losses. Adaptive dimmer detection uses VMULT thresholds (e.g., VMULT_LD_LOW = 0.08–0.12 V, VMULT_TL_HIGH = 0.25–0.47 V) and timing windows to distinguish leading- vs trailing-edge dimmers and configure DP current sources accordingly.

Key Specifications

Pinout & Package

MP4060GK-P is packaged in MSOP-10, a thermally enhanced 3mm × 3mm surface-mount package with exposed pad for improved heat dissipation (θ_JA = 150°C/W). Pin numbering follows standard MSOP-10 top-view orientation.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar TRIAC-dimmable PFC LED controller applications.

Compared with MP4060GK-P, MP4061GK-P trades high-line performance for low-line compatibility, while BP57722 sacrifices integration and advanced dimming for lower unit cost-making MP4060GK-P optimal for premium 230VAC dimmable luminaires requiring reliability and tunability.

Availability

MP4060GK-P is available at Aetrix Electronics and suitable for residential LED retrofit lamps, commercial downlights, and industrial high-bay fixtures requiring stable component supply, long-lifecycle support, and RoHS-compliant manufacturing.

Supply support for MP4060GK-P includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and power ICs, with design centers in the US, China, and Taiwan, and global distribution through authorized partners.

The MP4060 belongs to MPS's LED Driver product line, engineered specifically for TRIAC-dimmable, high-line, single-stage AC/DC LED lighting-emphasizing PFC, thermal robustness, and seamless dimmer interoperability.

FAQ

What is the maximum output power supported by MP4060GK-P?

The MP4060GK-P is validated for solid-state lighting applications up to 50W, as confirmed in the datasheet's Typical Application section and thermal derating curves. Its SOIC-8/MSOP-10 packages and internal 250mΩ MOSFET limit practical continuous output to 50W at 230VAC with adequate heatsinking and board layout. Exceeding this risks thermal foldback activation or reduced lifetime.

Does MP4060GK-P require an optocoupler for regulation?

No. MP4060GK-P implements primary-side real-current control, deriving LED current from VREF (0.414 V), transformer turns ratio N, and sense resistor RS-eliminating the need for optocouplers, secondary-side feedback windings, or TL431 references. This reduces component count, cost, and failure points while maintaining ±5% current accuracy.

How does the BD pin simplify bleeder circuit design?

The BD pin integrates an open-drain MOSFET (R_DS(ON) = 60–115 Ω) that actively pulls down the gate/control node of an external active bleeder transistor during normal operation. This disables the bleeder-removing standby power loss-without requiring additional logic or gate drivers, cutting BOM by one transistor and two resistors.

Can MP4060GK-P operate with both leading- and trailing-edge dimmers?

Yes. Its adaptive dimmer detection uses VMULT voltage thresholds (e.g., VMULT_LD_LOW = 0.08–0.12 V, VMULT_TL_HIGH = 0.25–0.47 V) and timing windows (tLD = 86–134 µs, tTL = 388–602 µs) to autonomously identify dimmer type and configure DP current sources (IDP_STRONG_LD = 27–43 mA, IDP_TL = 133–167 mA) for optimal compatibility and deep dimming.

What protection features are included and how do they recover?

MP4060GK-P includes output over-voltage (OVP), output short-circuit (SCP), winding short-circuit, supply UVLO, over-temperature (OTP), and cycle-by-cycle over-current protection-all with auto-restart. Upon fault, VCC drops below VCCEN (6.7–7.6 V), triggering internal recharge; recovery occurs after AC line cycles, ensuring safe, hands-off system resilience without latch-off.

Is the DIM pin capable of driving external circuitry?

Yes. The DIM pin provides 2–4 mA source current and 1.5–4 mA sink current, sufficient to drive small external MOSFET gates or dummy loads. In warm-sunset applications, it modulates duty ratio across the dimming cycle to coordinate warm-white and cool-white LED strings-enabling CCT shift without external MCU or DAC.

What is the recommended PCB layout practice for ZCD noise immunity?

Route the ZCD trace short and away from noisy nodes (D, S, MULT); use a dedicated ground pour under the ZCD pin connected to GND at a single point near the IC; place RZCD1/RZCD2 close to ZCD with Kelvin connection to auxiliary winding; and avoid routing ZCD parallel to high-dv/dt traces to prevent false zero-crossing detection.