Monolithic Power Systems Inc. MP5002DQ-LF-Z

Overview

MP5002DQ-LF-Z from Monolithic Power Systems is a programmable current-limit load switch IC designed for 3.3V input systems, integrating a 44mΩ DMOS power FET, adjustable 1A–3A current limit via external resistor, and slew-rate-controlled soft-start via dv/dt pin. It provides overvoltage clamping (4.5V), UVLO (2.35V typ), thermal shutdown (175°C), and bidirectional Enable/Fault signaling - deployed in hot-swap and portable power rails.

For engineers reviewing the MP5002DQ-LF-Z datasheet, MP5002DQ-LF-Z pinout, MP5002DQ-LF-Z application, or MP5002DQ-LF-Z equivalent, key selection criteria include verified 44mΩ R_DS(on), confirmed 1.1ms default VOUT ramp time with floating dv/dt pin, validated tri-state Enable/Fault interface behavior, and QFN10 (3×3mm) thermal pad layout requirements.

Technical Context

The MP5002DQ-LF-Z implements a sense-FET-based current-limit architecture where trip and hold thresholds are set by an external resistor between +ILIMIT and –ILIMIT pins; at RLIMIT = 24Ω, it delivers 2.5A trip and 1.55A hold current. Its internal charge pump enables full gate drive for low R_DS(on) across 2.5V–4V input range.

UVLO (2.35V typ, 100mV hysteresis) and overvoltage clamp (4.5V typ) operate independently of enable state; thermal shutdown latches output off until EN/Fault is pulled low or VIN drops below UVLO. The dv/dt pin supports optional external capacitor to extend rise time from 1.1ms to >20ms.

Key Specifications

Pinout & Package

MP5002DQ-LF-Z uses a thermally enhanced QFN10 (3mm × 3mm) package with exposed VIN pad for low-impedance power and thermal path. Pin 11 is the exposed pad, electrically connected to VIN and requiring PCB solder connection for optimal performance.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar programmable current-limit switch applications.

Compared with TPS2557DRCT and NIS5132MN, MP5002DQ-LF-Z uniquely combines programmable current limit, dv/dt-controlled soft-start, and integrated UVLO/OV clamp in a single QFN10 package - enabling robust 3.3V rail protection without supplemental ICs.

Availability

MP5002DQ-LF-Z is available at Aetrix Electronics and suitable for hot-swap modules, PC card power management, cell phone battery charging paths, and laptop USB-C power delivery rails requiring stable component supply, RoHS-compliant packaging, and production-ready lead times.

Supply support for MP5002DQ-LF-Z includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and power ICs, with core expertise in DC/DC conversion, load switching, and motor control solutions.

The MP5002 product line targets compact, high-reliability power distribution in portable and embedded systems - delivering integrated protection, programmability, and thermal resilience for 3.3V rail management.

FAQ

What is the minimum input voltage required for MP5002DQ-LF-Z to enable output?

The MP5002DQ-LF-Z features Under Voltage Lockout (UVLO) with a typical turn-on threshold of 2.35V and hysteresis of 100mV. Output enables only when VIN rises above 2.35V; below 2.25V, the device remains disabled and drives the Enable/Fault pin low to clear fault status.

How is the current limit set, and what resistor value yields 2.5A trip current?

Current limit is set by a resistor between +ILIMIT (Pin 6) and –ILIMIT (Pin 7). Per Table 1 in the datasheet, a 24Ω resistor yields a typical trip current of 2.5A and hold current of 1.55A at VIN = 3.3V. Resistor tolerance directly impacts accuracy - ±1% metal film is recommended.

Can the dv/dt pin be left unconnected, and what is the resulting VOUT rise time?

Yes, the dv/dt pin may be left floating. With no external capacitor, the internal circuit delivers a typical VOUT rise time of 1.1ms (10% to 90%). This default soft-start prevents inrush current spikes without requiring additional components.

What happens when thermal shutdown activates, and how is it reset?

At 175°C junction temperature, thermal shutdown latches the output off and drives the Enable/Fault pin to mid-level (0.8–2.0V) to signal fault. Reset requires pulling the Enable/Fault pin low externally or cycling VIN below UVLO threshold - power cycling alone does not clear the latch.

Is an external pull-up resistor required on the Enable/Fault pin?

No. The Enable/Fault pin has an internal 25µA weak pull-up current. When released (not driven low), it rises to ~3.3V, enabling the device. An external pull-up is unnecessary and may interfere with mid-level fault signaling.

Does MP5002DQ-LF-Z provide overvoltage protection on the VOUT side?

No - overvoltage protection applies only to VIN. The device clamps VIN-to-VOUT differential to 4.5V max when VIN exceeds safe range, protecting downstream loads from input-side transients. It does not regulate or clamp VOUT against load-generated backfeed or inductive kickback.

What is the maximum continuous current the device can sustain without thermal shutdown?

Without heatsinking, sustained hold current must stay below 909mA at +25°C ambient to avoid triggering thermal shutdown, based on θJA = 50°C/W and 175°C shutdown threshold. With proper thermal vias and copper area, full 1.55A hold current is achievable in typical 2-layer layouts.