Monolithic Power Systems Inc. MP5014AGJ-Z

Overview

MP5014AGJ-Z from Monolithic Power Systems is a programmable current-limit load switch with integrated 36 mΩ DMOS FET, 10–13.8 V input range, 15 V over-voltage clamp, and adjustable slew rate via DV/DT pin. It protects downstream circuits during hot-swap events in storage and set-top box power rails by limiting inrush current and clamping transients.

For engineers reviewing the MP5014AGJ-Z datasheet, MP5014AGJ-Z pinout, MP5014AGJ-Z application, or MP5014AGJ-Z equivalent, key selection criteria include its adjustable 2.8–4.9 A hold current (via external resistor), thermal latch at 175°C, tri-state ENABLE/FAULT interface for fault signaling, and TSOT23-8 footprint compatibility with space-constrained board layouts.

Technical Context

The MP5014AGJ-Z implements a sense-FET-based current-limit architecture with internal charge-pump gate drive, enabling low R_DS(on) without external biasing. Its UVLO (8.5 V typ.) and OVP (15 V typ.) operate independently of enable state to ensure protection during brownout or surge conditions.

DV/DT pin controls output voltage ramp time (1 ms default, scalable to 20.3 ms with 1 nF) using an internal 50 pF capacitor plus optional external capacitance. ENABLE/FAULT serves as a bidirectional three-level I/O: low disables and clears faults, mid signals thermal shutdown, high enables - eliminating need for external pull-up resistors.

Key Specifications

Pinout & Package

TSOT23-8 package: 2.9 mm × 1.6 mm × 0.85 mm body, 0.65 mm lead pitch, exposed thermal pad (pins 5–6 connected to SOURCE). Pin 1 is lower-left when top marking "AMJ" is read left-to-right.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar programmable current-limit switch applications.

Compared with TPS25940L and NIS5132MN, MP5014AGJ-Z offers optimal balance for analog-only hot-swap: no MCU dependency, built-in 15 V clamp eliminates external TVS, and 1 ms default slew rate meets JEDEC JESD62B Class 2 requirements without component count increase.

Availability

MP5014AGJ-Z is available at Aetrix Electronics and suitable for storage (HDDs/SSDs), hot-swap systems, and set-top boxes requiring stable component supply, long-term lifecycle assurance, and RoHS-compliant packaging.

Supply support for MP5014AGJ-Z includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and power ICs, with design centers in the US, China, and Taiwan.

The MP5014A belongs to MPS's programmable load switch product line, engineered specifically for robust hot-swap and inrush current control in 12 V distributed power architectures - emphasizing simplicity, reliability, and minimal external component count.

FAQ

What is the minimum external resistor value for I-LIMIT to achieve 4.9 A hold current?

The datasheet specifies 22 Ω yields 3.8 A hold current. For 4.9 A, RLIMIT ≈ 15.4 Ω per Table 2 - confirmed by characterization data showing 5.61 A hold current at 15.4 Ω. Use 1% tolerance metal-film resistor to maintain accuracy across temperature.

Can MP5014AGJ-Z operate with VCC = 9 V?

No - the UVLO threshold is 7.7–9.3 V, but operation below 10 V violates Recommended Operating Conditions. At 9 V, the device may intermittently enable/disable or fail to sustain current limit, risking downstream instability. Minimum reliable input is 10 V.

How does the ENABLE/FAULT pin behave during thermal shutdown?

During thermal shutdown, ENABLE/FAULT is driven to an intermediate voltage level (0.82–1.95 V), distinct from low (fault clear) or high (enabled). This mid-level state persists until power is cycled or the pin is pulled low externally - providing unambiguous hardware fault indication without software polling.

Is an external capacitor required on the DV/DT pin?

No - DV/DT floats by default, delivering 1 ms rise time via internal 50 pF capacitance. An external capacitor is only needed if longer slew rates are required (e.g., 470 pF extends to 9.6 ms). Leaving DV/DT unconnected is the standard configuration for most 12 V hot-swap applications.

What is the maximum continuous output current at 85°C ambient with standard PCB layout?

With 0.5 in² copper pad, max continuous current is 2.3 A at TA = 80°C per datasheet. At 85°C ambient, derate further: using θJA = 100°C/W and TJ(MAX) = 125°C, max power dissipation is 4 W, limiting current to ~3.3 A - but thermal shutdown will trigger before reaching this if copper area is insufficient.

Does MP5014AGJ-Z support reverse current blocking?

No - the internal DMOS FET is not configured for reverse conduction blocking. When SOURCE voltage exceeds VCC (e.g., during output capacitor discharge), current can flow backward through the body diode. External reverse-blocking MOSFET or diode is required for bidirectional isolation.

What is the purpose of the 25 μA internal pull-up on ENABLE/FAULT?

The 25 μA current source pulls ENABLE/FAULT high when floating, enabling automatic turn-on without external components. It also limits voltage to 5 V max, protecting connected logic. This eliminates need for external pull-up resistors while ensuring predictable startup behavior across temperature and process variation.