Monolithic Power Systems Inc. MP5017AGD-P
- Part No.:
- MP5017AGD-P
- Manufacturer:
- Monolithic Power Systems Inc.
- Package:
- 12-VFQFN Exposed Pad
- Datasheet:
-
MP5017AGD-P.pdf
- Description:
- 3V TO 5.5V, 1A TO 5A CURRENT LIM
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
MP5017AGD-P from Monolithic Power Systems is a configurable current-limit switch with integrated reverse-current blocking, fast 5.8V output over-voltage clamp, and programmable soft-start. It operates from 3V to 5.5V input, delivers up to 5A current limit (set via external resistor), features 45mΩ RDS(ON), and resides in a thermally enhanced QFN-12 (2mm×3mm) package. It protects USB power distribution, hot-swap cards, and SSD/HDD power rails against inrush, short-circuit, over-temperature, and reverse conduction.
For engineers reviewing the MP5017AGD-P datasheet, MP5017AGD-P pinout, MP5017AGD-P application, or MP5017AGD-P equivalent, key selection criteria include adjustable current-limit threshold (1A–5A), 10µs OVP response time, reverse-blocking capability down to –200mA, fault reporting via open-drain FAULT pin, and thermal auto-retry behavior with 76ms recovery delay.
Technical Context
The MP5017AGD-P integrates dual N-channel MOSFETs for bidirectional blocking and uses internal current-sense amplification to regulate gate voltage during over-current events. Its DV/DT pin controls slew rate via an external capacitor, enabling precise soft-start timing (e.g., 7.2ms with 47nF).
It implements three independent protection loops: output OVP clamps VOUT at 5.8V with 10µs response; reverse-current detection triggers shutdown at –50mA (80µs deglitch) or –1A (immediate); and thermal shutdown activates at 175°C with 50°C hysteresis and auto-retry after 76ms cooling.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 3V to 5.5V continuous; supports 16V transient - enables robust operation in noisy 5V bus environments like hot-swap backplanes. |
| Current Limit Range | 1A to 5A (adjustable via ILIMIT resistor) - covers typical USB PD, SSD, and PC card load profiles without redesign. |
| RDS(ON) | 45mΩ at TJ = 25°C - minimizes power loss and self-heating under 3A sustained load (≤0.4W dissipation). |
| OVP Threshold & Response | 5.8V clamp with ≤20µs response - prevents downstream IC damage during input surges without external TVS dependency. |
| Reverse Current Blocking | Blocks conduction from VOUT to VIN down to –200mA - eliminates need for external back-to-back MOSFETs in battery-backup or dual-supply systems. |
| Quiescent Current | 210μA at EN high, 10μA at EN low - supports ultra-low-power standby states in DEVSLP-enabled storage devices. |
| Fault Reporting | Open-drain FAULT pin with 5ms OCP / 10µs OVP deglitch - provides clean, noise-immune system-level fault signaling to host MCU. |
Pinout & Package
MP5017AGD-P is housed in a thermally optimized QFN-12 (2mm × 3mm) package with exposed thermal pad (Pin 12). The package supports high-current routing and efficient PCB heat dissipation via direct pad soldering to internal ground planes.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2, 3 VCC | Power input supply rail | Accepts 3V–5.5V input; requires local 4.7μF ceramic decoupling; wide copper traces recommended for <50mΩ path impedance. |
| 4 SAS/OV | Startup enable / Input OVP control | Pull low or float to enable; pull high to disable; connect to resistor divider to set input OV threshold (e.g., 12V trip with 10k/2.2k). |
| 5 EN | Digital enable input | Logic-high (>1.47V) enables device; internal 3.4μA pull-up allows floating-enable operation; compatible with 1.8V/3.3V/5V logic. |
| 6 FAULT | Open-drain fault indicator | Sinks current when OCP, OTP, or OVP occurs; requires external pull-up; asserts within 5ms (OCP) or 10µs (OVP) of fault onset. |
| 7 DV/DT | Soft-start timing control | Connects to external capacitor (e.g., 47nF) to set tSS ≈ 7.2ms; internal 6.5μA current source enables predictable ramp control. |
| 8 ILIMIT | Current-limit programming node | Resistor to GND sets ILIMIT; e.g., 499Ω yields 2.4A; tolerance directly impacts trip accuracy (±15% typical). |
| 9, 10, 11 VOUT | Switched output terminal | Delivers regulated, current-limited, reverse-blocked output; paralleled pins reduce trace resistance and improve thermal spreading. |
| 12 GND | System ground reference | Exposed thermal pad; must be soldered to large PCB ground plane for θJA = 40°C/W and reliable 3A+ operation. |
Key Features
| Feature | Design Value |
|---|---|
| Adjustable current limit (1A–5A) | Set via single resistor on ILIMIT pin - eliminates BOM complexity vs. fixed-limit eFuses and enables one-footprint support across multiple load tiers. |
| Fast 5.8V output OVP clamp | 10µs response time with no external components - prevents >6.1V excursion into sensitive 5V logic, meeting USB-IF and SATA voltage margin requirements. |
| Reverse current blocking | Active blocking down to –200mA with automatic restart when VCC > VOUT – 2mV - replaces discrete back-to-back MOSFET solutions in dual-rail or battery-isolated systems. |
| Programmable soft-start | tSS controlled by DV/DT capacitor (e.g., 47nF → 7.2ms) - limits inrush dV/dt to <1V/ms, preventing backplane droop during hot-insertion of PCIe or M.2 modules. |
| Thermal auto-retry with 76ms delay | Shuts down at 175°C, resumes after cooling to 125°C + 76ms - enables self-recovery from momentary overload without host intervention in embedded storage controllers. |
Applications
| HDD/SSD Power Protection | USB-C Power Distribution |
|---|---|
|
Use Scenario: Protecting 2.5″ SSDs during hot-plug into live 5V backplanes where inrush and reverse feed from backup capacitors can disrupt host power integrity. IC Role / Device Role / Timing Role: Acts as intelligent eFuse between host 5V rail and SSD VCC, enforcing 2.4A current limit, clamping transients to 5.8V, and blocking reverse discharge from SSD bulk caps. Use Value: Prevents host voltage sag below 4.75V during insertion, eliminates need for external TVS diodes, and ensures SATA link stability via sub-20µs OVP response. |
Use Scenario: Enabling safe 5V/3A power delivery from USB-C upstream ports to peripherals while supporting DEVSLP mode for low-power suspend. IC Role / Device Role / Timing Role: Serves as programmable current-limit switch with SAS/OV disable pin tied to DEVSLP signal, allowing full power removal during sleep without leakage paths. Use Value: Achieves <15μA system standby current (EN low + SAS high), meets USB Type-C specification for port power control, and blocks reverse current from peripheral VBUS to host. |
| Hot-Swap PC Cards | Wireless Modem Data Cards |
|
Use Scenario: Inserting PCIe-based expansion cards into powered carrier boards where uncontrolled inrush could reset the host controller or trigger upstream OCP. IC Role / Device Role / Timing Role: Controls VOUT slew rate via DV/DT capacitor to limit dV/dt to <0.5V/ms, ensuring smooth power ramp and avoiding false brown-out detection. Use Value: Enables reliable hot-swap compliance per PCI-SIG specifications; 45mΩ RDS(ON) keeps insertion loss under 120mV at 2.5A, preserving PCIe receiver margins. |
Use Scenario: Powering LTE/5G modems in portable routers where battery-backed VOUT must not feed back into main 5V rail during battery-swapping or low-VIN conditions. IC Role / Device Role / Timing Role: Provides bidirectional isolation using internal N-MOSFET pair; blocks reverse current at –50mA with 80µs deglitch, preventing modem VCC collapse. Use Value: Eliminates need for discrete reverse-blocking diode (saving ~0.3W loss) and ensures modem retains state during main rail interruption, improving connection resilience. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar current-limit switch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TCKE801G | Fixed 2.1A current limit; no adjustable OVP; 60mΩ RDS(ON); no reverse blocking | Lacks programmability and reverse isolation - suitable only for static-load applications with known, stable current draw. | Select only if cost sensitivity outweighs design flexibility and reverse-protection requirements. |
| TPS25940ARVCR | 2.7V–18V range; 0.6A–5.3A adjustable limit; 32mΩ RDS(ON); includes load switch control and precision current monitoring | Broader VIN range and analog current monitor output - adds complexity and cost where only basic protection is needed. | Prefer when system requires real-time current telemetry or operation beyond 5.5V, such as industrial 12V rails. |
Compared with TCKE801G and TPS25940ARVCR, MP5017AGD-P uniquely balances compact QFN-12 size, 5.8V fast OVP, and true reverse-current blocking - making it optimal for space-constrained 5V storage and communication modules where bidirectional fault containment is mandatory.
Availability
MP5017AGD-P is available at Aetrix Electronics and suitable for HDD/SSD power management, USB-C power distribution, and hot-swap PC card applications requiring stable component supply, long-term lifecycle assurance, and RoHS-compliant packaging.
Supply support for MP5017AGD-P includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance power management ICs, with design centers in the US, China, and Taiwan, and global manufacturing partnerships.
The MP5017A product line targets compact, high-reliability power protection in storage, computing, and communications equipment - delivering integrated eFuse functionality with minimal external components and industry-leading thermal performance in sub-3mm² packages.
FAQ
What is the minimum external resistor value for 5A current limit?
The MP5017AGD-P achieves ~5A current limit with a 226Ω resistor from ILIMIT to GND, per Equation (2): ILIMIT = 1.16V × 10³ / RLIMIT. At this setting, typical current limit is 5.04A with ±15% tolerance due to internal reference and sense amplifier variation. Layout parasitics and temperature drift may shift actual trip point by ±0.2A.
How does the FAULT pin behave during thermal shutdown?
During thermal shutdown, the FAULT pin pulls low immediately with no deglitch delay - unlike OCP (5ms) or OVP (10µs) events. This direct assertion enables rapid host MCU response. Recovery occurs only after die temperature falls below 125°C and the internal 76ms timer expires, ensuring stable restart without oscillation.
Can MP5017AGD-P support DEVSLP mode in SATA or NVMe SSDs?
Yes - the SAS/OV pin supports DEVSLP by pulling high to disable the device and activate output discharge. When SAS/OV is high, VOUT discharges through an internal 130Ω resistor, bringing SSD VCC to near-zero in <10ms (with 100μF output cap). This satisfies SATA Link Power Management (LPM) DevSlp entry timing requirements.
What is the maximum allowable output capacitance for stable soft-start?
The MP5017AGD-P supports up to 2200μF output capacitance during soft-start, as verified in typical waveforms (page 7). With COUT = 2200μF and CDV/DT = 47nF, VOUT ramps linearly at ~0.7V/ms. Larger values risk exceeding the 10% VOUT droop specification during current-limit regulation and may require increased ILIMIT resistor to maintain trip margin.
Does reverse current blocking remain active when EN is low?
Yes - reverse current blocking remains fully functional when EN is low, provided SAS/OV is not pulled high. The internal N-MOSFET pair stays biased to block conduction from VOUT to VCC. Only when both EN = low AND SAS/OV = high does the device enter full shutdown with discharge enabled and all blocking disabled.
Is the exposed thermal pad electrically connected to GND?
Yes - Pin 12 (exposed pad) is internally connected to GND and must be soldered to a dedicated PCB ground plane. Thermal resistance drops from θJA = 70°C/W (2-layer JEDEC board) to 40°C/W (EV5017A-D-00A evaluation board) when properly connected, enabling reliable 3A continuous operation at +70°C ambient.
What happens during a hard short at VOUT with 5A current limit set?
At hard short, the MP5017AGD-P first regulates at 5A for ~10µs, then triggers secondary current limit at 7.5A. The gate is rapidly discharged via 100mA pull-down, turning off the MOSFET within 100ns. After ~1ms off-time, it auto-retries - cycling until fault clears or thermal shutdown activates at 175°C.
MP5017AGD-P Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Monolithic Power Systems Inc.
- Package/Case:
- 12-VFQFN Exposed Pad
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Switch Type:
- USB Switch
- Number of Outputs:
- 1
- Ratio - Input:Output:
- 1:1
- Output Configuration:
- High/Low Side
- Output Type:
- N-Channel
- Interface:
- On/Off
- Voltage - Load:
- 3V ~ 5.5V
- Voltage - Supply (Vcc/Vdd):
- Not Required
- Current - Output (Max):
- 5A
- Rds On (Typ):
- 45mOhm
- Input Type:
- Non-Inverting
- Features:
- Load Discharge, Status Flag
- Fault Protection:
- Current Limiting (Fixed), Over Temperature, Over Voltage, UVLO
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 12-QFN (2x3)
MP5017AGD-P FAQ
1.How can I place an order for MP5017AGD-P through Aetrix?
Please submit a Request for Quotation (RFQ) for MP5017AGD-P on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MP5017AGD-P reliable?
The price and inventory of MP5017AGD-P are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MP5017AGD-P is usually 5 days.
3.What payment methods are accepted for MP5017AGD-P?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MP5017AGD-P transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MP5017AGD-P?
MP5017AGD-P orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MP5017AGD-P order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MP5017AGD-P?
For technical support, including MP5017AGD-P datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MP5017AGD-P requirements.
6.How does Aetrix verify that MP5017AGD-P is sourced from the original manufacturer or authorized distributors?
All MP5017AGD-P products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MP5017AGD-P meets industry standards.
7.What is the process for return or replacement of MP5017AGD-P?
All MP5017AGD-P units undergo pre-shipment inspection (PSI). If there is an issue with MP5017AGD-P, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MP5017AGD-P part is unused and in its original packaging.
Return procedure for MP5017AGD-P:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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