Monolithic Power Systems Inc. MP5017GD-Z

Overview

MP5017GD-Z from Monolithic Power Systems is a programmable current-limit switch with integrated 45mΩ R_DS(ON) N-channel MOSFET pair, reverse current blocking, fast 5.8V output over-voltage clamp (10µs response), and adjustable 1A–5A current limit via external resistor. It operates from 3V–5.5V input, withstands 16V transients, and protects hot-swap interfaces in USB power distribution and SSD/HDD modules.

For engineers reviewing the MP5017GD-Z datasheet, MP5017GD-Z pinout, MP5017GD-Z application, or MP5017GD-Z equivalent, key selection criteria include its dual-MOSFET reverse-blocking architecture, DV/DT-controlled soft-start timing, fault-indicated OCP/OVP/OTP protection, and QFN-12 (2mm×3mm) thermal performance with θ_JA = 70°C/W.

Technical Context

The MP5017GD-Z implements back-to-back N-channel MOSFETs to block reverse current down to –200mA with 80µs deglitch, while its fast-output-OVP comparator clamps V_OUT at 5.8V within 10µs using internal gate control. Its current-limit loop responds in 10µs and activates a secondary 7.5A hard-short shutdown with 100mA gate discharge.

Under-voltage lockout (2.7V threshold, 250mV hysteresis) and thermal shutdown (175°C trip, 125°C recovery with 76ms auto-retry) are tightly coupled to the control logic. The SAS/OV pin enables both input OVP programming (1.25V threshold) and DEVSLP-compatible disable functionality without external components.

Key Specifications

Pinout & Package

MP5017GD-Z uses a thermally enhanced QFN-12 (2mm × 3mm) package with exposed thermal pad (Pin 12). The layout supports high-current paths (VCC/VOUT) and low-inductance grounding essential for fast transient response and EMI control.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar current-limit switch applications.

Compared with TCK107AG and TPS25942LARVAT, MP5017GD-Z uniquely integrates reverse blocking, 5.8V fast OVP, and DEVSLP-compatible SAS/OV in a 2mm×3mm QFN-making it optimal for space-constrained 5V hot-swap systems requiring full bidirectional protection.

Availability

MP5017GD-Z is available at Aetrix Electronics and suitable for HDD/SSD power protection, USB-C power distribution, and hot-swap data card applications requiring stable component supply, consistent parametric performance, and long-term industrial availability.

Supply support for MP5017GD-Z includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and power ICs, with design centers across Asia and North America.

The MP5017 belongs to MPS's eFuse and load switch product line, engineered specifically for robust hot-swap and power-path protection in storage, computing, and portable electronics where bidirectional fault containment and compact thermal packaging are critical.

FAQ

What is the maximum transient input voltage the MP5017GD-Z can withstand?

The MP5017GD-Z supports an absolute maximum input voltage of 16V, enabling reliable operation during hot-swap events and high-energy transients on 5V backplanes. This rating is validated per Absolute Maximum Ratings table and applies regardless of duration, provided junction temperature remains within limits.

How does the MP5017GD-Z implement reverse current blocking?

It uses two integrated N-channel MOSFETs in series (back-to-back configuration) to block reverse current flow from VOUT to VCC. When reverse current exceeds –50mA for >80µs, or reaches –1A instantaneously, the gate drive shuts off both FETs. Blocking resumes only when VCC > VOUT – 2mV.

Can the output over-voltage clamp be adjusted?

No-the 5.8V output over-voltage clamp is fixed and internally trimmed. It activates within 10µs when VOUT exceeds 5.5V (min) and is guaranteed not to exceed 6.1V (max). The SAS/OV pin controls *input* over-voltage threshold only, not the output clamp.

What is the purpose of the DV/DT pin, and how is soft-start time calculated?

DV/DT sets soft-start slew rate via an external capacitor to GND. Soft-start time (t_SS) ≈ (C_DV/DT × 1V) / 6.5µA. For example, a 47nF capacitor yields t_SS ≈ 7.2ms. This prevents inrush-induced voltage droop and EMI during power-up.

Does the Fault pin indicate all fault types with the same timing behavior?

No-Fault asserts with different deglitch delays: 5ms for over-current, 10µs for output over-voltage, and no deglitch for over-temperature. This ensures fast OVP response while filtering noise on OCP, and immediate thermal shutdown signaling without delay.

Is the MP5017GD-Z RoHS-compliant and lead-free?

Yes-MP5017GD-Z is lead-free, halogen-free, and fully compliant with the EU RoHS directive. All MPS products meet these environmental standards, and green status documentation is available on the official MPS website under Quality Assurance.

What thermal performance can be expected in a standard 4-layer PCB layout?

On a JEDEC-standard 4-layer PCB (JESD51-7), the MP5017GD-Z exhibits θ_JA = 70°C/W and θ_JC = 15°C/W. With 1.8W max continuous power dissipation at 25°C ambient, proper copper pour on the exposed pad is essential to maintain T_J ≤ 125°C under 5A load.