Monolithic Power Systems Inc. MP5022AGQV-Z

Overview

MP5022AGQV-Z from Monolithic Power Systems is a hot-swap protection IC with integrated 3mΩ power FET, 12A continuous current limit (adjustable via ISET resistor), ±3% current monitor accuracy (6–12A), and fast 200ns short-circuit response. It operates from 8V to 16V input, provides programmable soft-start, output discharge, and dual UVLO/OVLO protection - deployed in server backplane power insertion and PC card hot-plug systems.

For engineers reviewing the MP5022AGQV-Z datasheet, MP5022AGQV-Z pinout, MP5022AGQV-Z application, or MP5022AGQV-Z equivalent, this device delivers precise current limiting, real-time IMON-based load monitoring, thermal shutdown, damaged MOSFET detection, and PG/FLTB fault signaling for robust system-level power sequencing and fault recovery.

Technical Context

The MP5022AGQV-Z implements a sense-FET current-limit architecture with external R_SET-programmed threshold (11.34–13.86A typical), backed by a secondary 36A fast-turnoff circuit triggered within 200ns. Its internal charge pump enables full gate drive for the low-R_DS(on) FET, eliminating external high-side driver requirements.

It integrates dual independent timing functions: a 43μA insertion delay timer (TIMER pin) for controlled VIN ramp-up, and a 1.1μA LOADEN blanking timer (ENTM pin) that disables LOADEN deassertion during startup. PG assertion requires simultaneous conditions: FB > 1.245V, V_GS > 3V, and V_OUT > V_IN − 1V - ensuring reliable power-good validation before system enable.

Key Specifications

Pinout & Package

MP5022AGQV-Z is housed in a thermally enhanced QFN-22 package (3mm × 5mm, 0.5mm pitch) with exposed thermal pad for PCB heat sinking. Pin numbering follows standard top-view layout with pins 1–10 on top row, 11–20 on bottom row, and pins 21–22 + exposed pad on input side.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar hot-swap protection applications.

Compared with TPS23521RGET and LT4210CMS#TRPBF, MP5022AGQV-Z offers superior thermal efficiency (3mΩ vs. 6.5/12mΩ), integrated current monitoring, and compact QFN-22 packaging - making it optimal for high-density 12V hot-swap systems requiring telemetry and minimal board footprint.

Availability

MP5022AGQV-Z is available at Aetrix Electronics and suitable for server backplane insertion, PC card hot-swap, and disk drive power management requiring stable component supply, long-term lifecycle support, and traceable sourcing.

Supply support for MP5022AGQV-Z includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and power ICs, with design centers in the US, China, and Taiwan.

The MP5022A belongs to MPS's hot-swap and eFuse product line, engineered specifically for high-reliability 12V infrastructure applications including data center servers, enterprise storage, and telecom equipment.

FAQ

What is the minimum soft-start time for MP5022AGQV-Z, and how is it achieved?

The minimum soft-start time is 1ms, achieved by leaving the SS pin unconnected (floating). In this configuration, an internal 8μA current source charges the gate, resulting in a fixed 1ms V_GS ramp time before output voltage rise begins. This mode bypasses external capacitor control and is used when fastest possible turn-on is required without inrush risk.

How does the MP5022AGQV-Z detect a damaged MOSFET during power-up?

It detects a shorted pass FET by monitoring V_OUT relative to V_IN during startup: if V_OUT exceeds V_IN − 1V before V_GS reaches full enhancement, the device interprets this as a failed FET. FLTB is immediately driven low, and the power switch remains latched off until V_OUT ≤ V_IN − 1V is confirmed.

Can the IMON pin be used for closed-loop current regulation?

No - IMON is a monitoring-only output with 10μA/A transconductance and 3V compliance. It provides proportional voltage for external ADC or comparator readback but lacks the bandwidth, accuracy, or feedback path to serve as a regulation control signal. Current limiting is handled internally via the ISET-programmed loop.

What is the purpose of the PD pin, and what resistor value should be used?

The PD pin provides active output discharge when the device is disabled. Connect it to the OUT net via a resistor ≥100Ω to control discharge rate - lower resistance increases discharge current but raises power dissipation in the PD path. Floating PD disables discharge entirely; typical values range from 100Ω to 1kΩ depending on required discharge time and thermal budget.

Does MP5022AGQV-Z support automatic restart after a current-limit fault?

No - it uses a latched-off fault response. Once the TIMER pin voltage reaches 1.24V due to sustained current limit, the FET shuts down permanently until EN is cycled low-then-high or VIN is removed and reapplied. This prevents repeated stress on the FET during persistent overload conditions.

How is the LOADEN blanking time calculated, and why is it needed?

Blanking time t_LDNB = 1.24 × C_ENTM × 10⁶ seconds, where C_ENTM is in farads. A 1μF capacitor yields ~1.24s blanking. It prevents LOADEN deassertion from prematurely disabling the FET during startup transients - ensuring the device completes insertion delay, soft-start, and PG validation before accepting LOADEN control.

What thermal derating applies above 25°C ambient?

θ_JA = 46°C/W on a 4-layer JEDEC board. At 85°C ambient, maximum continuous power dissipation drops to (125°C − 85°C)/46°C/W ≈ 0.87W - limiting usable current to ~7.5A (based on P = I² × R_DS(on)). Layout enhancements (copper area, vias to inner layers) can improve θ_JA and extend usable current range.