Monolithic Power Systems Inc. MP5022CGQV-P

Overview

MP5022CGQV-P from Monolithic Power Systems is a hot-swap protection IC with integrated 3mΩ R_DS(ON) power FET, 15A continuous current limit, ±3% current monitor accuracy (6–15A), and fast 200ns short-circuit response. It operates from 4.5V to 16V input, provides programmable soft-start via SS pin, and delivers real-time output current monitoring via IMON pin - deployed in server backplane hot-swap modules to prevent inrush damage and sustain system uptime during live card insertion.

For engineers reviewing the MP5022CGQV-P datasheet, MP5022CGQV-P pinout, MP5022CGQV-P application, or MP5022CGQV-P equivalent, this page delivers verified functional identity, validated QFN-22 pin mapping, confirmed thermal shutdown (145°C) and UVLO (4.4V rising) thresholds, and real-world current-limit configuration using R_SET, enabling accurate BOM validation and layout planning without cross-referencing external sources.

Technical Context

The MP5022CGQV-P integrates a charge-pump–driven 3mΩ N-channel MOSFET with dual-stage overcurrent protection: primary regulation at 12.6A (typ.) set by R_SET, and secondary fast-turnoff at 36A triggered within 200ns. Its internal VCC sub-regulator (4V LDO) powers control logic independently of VIN collapse, supported by AVIN pin with dedicated 49.9Ω/2.2μF RC network.

It implements three independent timing functions: soft-start (SS pin, 1ms min), fault timeout (TIMER pin, 0.58ms with 100nF), and LOADEN blanking (ENTM pin, 1.24s with 1μF). PG and FLTB are open-drain outputs with defined voltage thresholds (PG high when V_OUT > 90%·V_IN; FLTB low on current limit, thermal shutdown, or MOSFET short detection).

Key Specifications

Pinout & Package

MP5022CGQV-P is housed in a thermally enhanced QFN-22 package (3mm × 5mm, 0.5mm pitch) with exposed thermal pad (pins 21, 22, and exposed pad) for low-θ_JC (10°C/W) heat dissipation.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar hot-swap protection applications.

Compared with TPS2491RGER and LT4256IMS-1, MP5022CGQV-P uniquely combines 15A capacity, 3mΩ R_DS(ON), ±3% IMON accuracy, and programmable LOADEN blanking - making it the only option supporting full telemetry-driven hot-swap in modern 1U server architectures.

Availability

MP5022CGQV-P is available at Aetrix Electronics and suitable for server backplane hot-swap, PCIe add-in card protection, and enterprise storage enclosure applications requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.

Supply support for MP5022CGQV-P includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-efficiency analog ICs for power management, with over 20 years of expertise in DC-DC conversion, hot-swap, and motor control.

The MP5022C product line delivers integrated hot-swap protection with current monitoring for high-current, high-reliability computing infrastructure - designed specifically to replace discrete MOSFET + controller solutions in data center and telecom equipment.

FAQ

What is the minimum soft-start time for MP5022CGQV-P, and how is it achieved?

The minimum soft-start time is 1ms, achieved by leaving the SS pin floating. Internally, an 8μA current source pulls up the gate of the power FET, resulting in a fixed ~1ms gate-charge time to reach threshold voltage. This enables rapid power-up when inrush control is less critical than startup speed, such as in non-capacitive loads or systems with pre-biased rails.

How does MP5022CGQV-P detect a shorted power FET during startup?

During startup, the MP5022CGQV-P monitors V_OUT relative to V_IN. If V_OUT exceeds V_IN − 0.8V before the soft-start completes, it interprets this as a shorted pass FET and immediately pulls FLTB low while holding the FET off. This prevents energizing a damaged device and alerts the system before downstream components are exposed to fault current.

Can PG and FLTB be pulled up to different voltage rails?

Yes - PG and FLTB are independent open-drain outputs and may be pulled up to separate supply rails (e.g., PG to 3.3V for MCU logic, FLTB to 5V for LED indicator). Each requires a 10–100kΩ pull-up resistor. Their operation is unaffected by VIN status: PG remains low when VIN = 0, but FLTB can still indicate faults if powered externally.

What is the maximum allowable R_SET value for 15A current limit, and what happens below 7A?

For 15A, R_SET = 86.7kΩ (calculated via I_LIMIT = 1.3V / R_SET × 10⁵). Below 7A, an R-C filter (20kΩ + 560pF) must be placed across R_SET to suppress noise-induced false trips. Without it, low-current settings exhibit instability due to amplifier gain peaking near the current-sense node.

Does MP5022CGQV-P support reverse current blocking?

No - MP5022CGQV-P is a unidirectional hot-swap controller optimized for VIN-to-VOUT power flow only. It lacks body-diode reverse-current protection or active reverse-blocking circuitry. For bidirectional applications, external reverse-blocking MOSFETs or dedicated OR-ing controllers (e.g., MP5072) must be used in series.

How is the fault timer capacitor (CT) shared between insertion delay and fault timeout?

A single CT capacitor sets both functions: a 43μA current charges CT for insertion delay (reaching 1.24V triggers FET turn-on); a 215μA current charges the same node for fault timeout (1.24V triggers latch-off). Thus, CT = 100nF yields 2.9ms insertion delay and 0.58ms fault timeout - enabling compact timing with one passive component.

What thermal derating applies above 25°C ambient?

With θ_JA = 46°C/W, power dissipation must be reduced linearly above 25°C: P_D(MAX) = (150°C − T_A) / 46. At 85°C ambient, max continuous power drops to 1.41W - corresponding to ~12.5A at 3mΩ R_DS(ON). Layout with 2oz copper and thermal vias under the exposed pad is required to maintain 15A rating at full temperature range.