Monolithic Power Systems Inc. MP5098AGDT-P

Overview

MP5098AGDT-P from Monolithic Power Systems is a dual-channel e-fuse IC with integrated SAS (System Alert Signal) control, reverse current blocking for the 5V channel, and an internal 5V/10mA LDO regulator. It delivers 4.5A ±10% current limiting on the 12V input channel and 3A ±10% on the 5V channel, with 44mΩ R_DS(ON) per FET, over-voltage protection at 15V (12V channel) and 5.7V (5V channel), and operates in hot-swap power delivery for storage subsystems.

For engineers reviewing the MP5098AGDT-P datasheet, MP5098AGDT-P pinout, MP5098AGDT-P application, or MP5098AGDT-P equivalent, this device is selected for dual-rail fault protection where coordinated enable logic, transient immunity up to 22V (100ms), and reverse-current blocking in 5V domains are required - especially in SSD/HDD power sequencing with SAS interface compliance.

Technical Context

The MP5098AGDT-P implements two independent current-limiting power switches with fast-acting short-circuit protection (≤1µs response), UVLO thresholds of 8.6V (CH1) and 4.0V (CH2), and latch-off thermal shutdown at 150°C. Each channel features dedicated soft-start pins (SS1/SS2) controlling output ramp rate via external capacitors, and both channels share EN and SAS inputs for synchronized start-up and forced shutdown logic.

Its functional block integrates dual charge-pump gate drivers, current-sense amplifiers, fast-off comparators, and reverse-blocking N-MOSFET control for the 5V channel only. The internal LDO supplies regulated 5V/10mA with ±3% load regulation and supports system biasing without external regulators.

Key Specifications

Pinout & Package

TQFN-10 (2mm × 3mm) package with exposed thermal pad; RoHS-compliant, halogen-free, MSL Level 1.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-rail e-fuse applications.

Compared with TPS25942LARVAT and RTQ2134BGQW, the MP5098AGDT-P uniquely combines SAS pin compatibility, 5V reverse blocking, and integrated LDO in one TQFN-10 package - reducing solution size by ≥40% and eliminating three external components in SAS storage applications.

Availability

MP5098AGDT-P is available at Aetrix Electronics and suitable for enterprise SSD power sequencing, SAS backplane protection, HDD actuator management, and industrial RAID controller auxiliary rail design requiring stable component supply and long-term lifecycle support.

Supply support for MP5098AGDT-P includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance power management ICs, with expertise in DC/DC converters, e-fuses, LED drivers, and motor drivers.

The MP5098A belongs to MPS's SAS-compliant e-fuse product line, designed specifically for storage infrastructure applications demanding coordinated dual-rail protection, protocol-aware shutdown, and minimal footprint in high-density server and storage platforms.

FAQ

What is the maximum transient voltage the MP5098AGDT-P can withstand on VIN1 and VIN2?

The MP5098AGDT-P supports up to +22V for 100ms on either VIN1 or VIN2, and −3V for 1ms on both inputs. These ratings are validated per absolute maximum specifications and enable robust operation during hot-swap events without external TVS diodes in most SAS storage applications.

How does the SAS pin interact with the EN pin during normal operation?

Both EN and SAS must be logic-high to keep the device enabled. If SAS is pulled high while EN is high, the device immediately shuts down both channels. This behavior is used to propagate SAS link-layer faults (e.g., phy reset, link down) into power-domain isolation - a requirement for SAS-3 compliance.

Can the MP5098AGDT-P be used with a 3.3V input rail?

No. The MP5098AGDT-P is specified only for 5V (4.5–5.5V) and 12V (10.8–13.2V) input rails. Its UVLO threshold for channel 2 is 3.9–4.1V, so a sustained 3.3V input will prevent turn-on. For 3.3V systems, consider the MP5097A or other MPS single-channel e-fuses rated down to 2.5V.

Is the internal LDO output short-circuit protected?

Yes. The integrated 5V LDO includes foldback current limiting and thermal shutdown. Under short-circuit, it limits output current to ~30mA (typical) and enters thermal shutdown if junction temperature exceeds 150°C - protecting both the LDO and main e-fuse die.

What is the minimum SS capacitor value needed for stable soft-start on the 12V channel?

A 100nF capacitor on SS1 yields ~0.83ms soft-start time. Lower values reduce t_SS but increase inrush dI/dt; 47nF is the practical lower limit before risking control loop instability or excessive peak current. Always verify with actual load capacitance and step-load testing.

Does the MP5098AGDT-P support independent enable/disable of each channel?

No. EN and SAS control both channels simultaneously. There is no provision for independent channel enable. Sequencing is achieved via UVLO thresholds (VIN1 rises before VIN2) and SS timing - not discrete channel gating.

How is reverse current blocking implemented on the 5V channel?

Reverse current blocking uses internal back-to-back N-channel MOSFETs between VIN2 and VOUT2. When EN and SAS are deasserted (low), the gate drive circuit turns off both FETs within 1µs, creating a high-impedance path that prevents current flow from VOUT2 back to VIN2 - critical for SAS link integrity during hot removal.