Monolithic Power Systems Inc. MP5098GDT-Z

Overview

MP5098GDT-Z from Monolithic Power Systems is a dual-channel electronic fuse IC designed for 12V and 5V power rails, providing integrated over-current, over-voltage, short-circuit, and thermal protection with current monitoring. It features 40mΩ R_DS(ON), 210µA/190µA quiescent current per channel, fixed 4A/3A trip limits, and TQFN-10 (2mm×3mm) packaging - deployed in SSDs, HDDs, and hot-swap backplanes.

For engineers reviewing the MP5098GDT-Z datasheet, MP5098GDT-Z pinout, MP5098GDT-Z application, or MP5098GDT-Z equivalent, key selection considerations include dual-rail independent enable control, IMON-based real-time load current sensing, hiccup-mode OCP recovery timing, and 2µs OVP response for transient-sensitive storage subsystems.

Technical Context

The MP5098 implements two independent high-side e-fuse channels with dedicated soft-start (SS1/SS2), current monitor (IMON1/IMON2), and enable (EN) logic. Each channel integrates a low-R_DS(ON) MOSFET, fast OVP comparator (2µs response), and dual-stage current limiting: primary trip (4A/3A) and secondary SCP threshold (8A).

Protection sequencing is hardware-defined: UVLO enables startup only above 10V (CH1) or 4.35V (CH2); OVP clamps VOUT at 15V (CH1) or 5.7V (CH2); thermal shutdown latches at 155°C; and hiccup-mode OCP cycles with 2ms on / 200ms off timing after sustained overcurrent.

Key Specifications

Pinout & Package

MP5098GDT-Z is housed in a thermally enhanced TQFN-10 (2mm × 3mm) package with exposed thermal pad. Pin 1 is marked by index area; recommended land pattern includes solder paste stencil openings for GND and thermal pad.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-rail e-fuse applications.

Compared with TPS25750RWER and BTS724G, MP5098GDT-Z uniquely delivers matched 12V/5V dual-channel protection with integrated current monitoring and sub-2µs OVP - making it optimal for space-constrained, high-reliability storage and telecom hot-swap designs requiring deterministic fault response.

Availability

MP5098GDT-Z is available at Aetrix Electronics and suitable for solid-state drives, hard-disk drives, and hot-swap backplane modules requiring stable component supply across extended product lifecycles.

Supply support for MP5098GDT-Z includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance power management ICs, with design focus on efficiency, integration, and reliability for computing, storage, and industrial applications.

The MP5098 belongs to MPS's e-fuse and hot-swap controller product line, engineered specifically for high-density storage systems and telecom infrastructure requiring dual-rail protection with minimal footprint and precise current visibility.

FAQ

What is the maximum input voltage the MP5098GDT-Z can withstand during transient events?

The MP5098GDT-Z supports 24V for 100ms on both VIN1 and VIN2 pins per absolute maximum ratings. This surge tolerance is validated for hot-swap scenarios without external TVS diodes, leveraging its integrated high-voltage MOSFET and charge-pump gate driver - critical for enterprise storage backplanes where transient immunity directly impacts field reliability.

How does the MP5098GDT-Z implement current monitoring without an external sense resistor?

MP5098GDT-Z embeds precision current-sense amplifiers with fixed gain (32µA/A for CH1, 34µA/A for CH2) that convert load current into proportional output current at IMON1/IMON2 pins. Connecting a resistor (e.g., 20kΩ) between IMONx and GND generates a linear 0–2.5V voltage - eliminating external shunt resistors, associated power loss, and layout sensitivity while maintaining ±5% accuracy over temperature.

Can the two channels be enabled independently, or is EN pin shared?

The EN pin is shared across both channels - pulling EN high disables both channels simultaneously; pulling EN low or leaving it floating enables both. There is no provision for independent channel enable/disable. This simplifies system-level control but requires external logic (e.g., AND gate with rail-specific fault signals) if per-rail sequencing is needed.

What happens during an over-voltage event on the 12V channel?

When VOUT1 exceeds 15V (typical OVP threshold), the internal comparator triggers within 2µs, pulling the gate of the CH1 MOSFET low to clamp VOUT1 at ~15V. The device remains in this regulated state until VIN1 drops below UVLO (9.6V) or the fault clears - preventing downstream 12V logic damage while maintaining partial system functionality during transient overvoltage.

Is thermal derating required for continuous 4A operation on the 12V channel?

Yes - R_DS(ON) rises from 40mΩ at 25°C to 65mΩ at 125°C, increasing conduction loss from 160mW to 1.04W at 4A. With θ_JA = 40°C/W on a 2-layer board, junction temperature rise would exceed 125°C ambient. Derating to ≤2.8A continuous or adding copper pour/thermal vias is required for sustained 4A loads in high-ambient environments.

Does the MP5098GDT-Z support adjustable current limit thresholds?

No - current limits are factory-fixed: 4A trip / 2.5A hold for CH1 (12V), 3A trip / 1.3A hold for CH2 (5V). These values cannot be modified via external components or programming. Designers must select appropriate load capacitance and downstream fusing to ensure compatibility with these hard-coded thresholds.

What is the purpose of the SS1 and SS2 pins beyond soft-start timing?

SS1 and SS2 pins serve exclusively as soft-start timing inputs - their voltage ramps linearly via internal 4–7µA current source charging external capacitors. They have no secondary function (e.g., fault reporting or status indication). The ramp rate directly controls VOUT slew rate, which determines inrush current magnitude and avoids triggering upstream current-limiting supplies during power-up.