Monolithic Power Systems Inc. MP5403GQBU-P
- Part No.:
- MP5403GQBU-P
- Manufacturer:
- Monolithic Power Systems Inc.
- Package:
- 20-UFQFN
- Datasheet:
-
MP5403GQBU-P.pdf
- Description:
- IC REG BUCK ADJ/0.6V DL 20UTQFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
MP5403GQBU-P from Monolithic Power Systems is a configurable mini PMIC integrating two high-efficiency buck converters (3.5A and 2.5A), one 3A load switch with 20mΩ RDS(ON), input power supervisory circuitry, and full sequencing control. It operates from 2.7V–6V input, delivers fixed or trimmable outputs (e.g., 0.9V–2.85V per rail), and targets compact solid-state drive power rails requiring fast transient response and low quiescent current (85µA total for both bucks).
For engineers reviewing the MP5403GQBU-P datasheet, MP5403GQBU-P pinout, MP5403GQBU-P application, or MP5403GQBU-P equivalent, key selection criteria include interleaved 1.5MHz operation, 180° phase shift for reduced input ripple, programmable PFL threshold via PFL_ADJ/CDELAY, independent EN/PG control per rail, and UTQFN-20 (2.5mm×3mm) package constraints for high-density SSD layouts.
Technical Context
The MP5403GQBU-P uses peak-current-mode control with 180° interleaved PWM clocks across its dual buck regulators to minimize input capacitance and improve dynamic load response. Each regulator supports 100% duty cycle operation via FB pin grounding and includes internal soft-start (350–500µs), output discharge (13Ω), and zero-current detection for light-load DCM transition.
Its integrated 3A load switch features soft-start, over-current protection (5.6A limit), and PG3 monitoring based on VIN3–VOUT3 differential (≤200mV). The PFL circuit provides immediate open-drain power-failure indication when PFL_ADJ falls below 0.6V, with adjustable delay (via CDELAY capacitor) and sustain voltage (VSUS) biasing for reliable supervision in multi-rail systems.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 2.7V–6V for VIN1; 2.0V–6V for VIN2 (when VIN1 > UVLO); 0.6V–6V for VIN3 - enables flexible multi-source biasing in SSDs with mixed supply domains. |
| Buck Output Current | 3.5A (Ch1) and 2.5A (Ch2) - sufficient to power core logic and I/O rails of SATA/NVMe SSD controllers without external current boosting. |
| Load Switch Current | 3A with 20mΩ RDS(ON) - limits conduction loss to <18mW at 3A, supporting efficient auxiliary rail delivery (e.g., NAND VCCQ). |
| Switching Frequency | 1.5MHz typical, 1.2–1.8MHz range - allows use of small 0.47µH inductors and <10µF ceramic output capacitors per rail. |
| Quiescent Current | 85µA total for both bucks - extends battery life in portable storage devices during standby or low-activity states. |
| Feedback Reference | 600mV ±6mV (25°C), ±9mV (–40°C to +125°C) - ensures tight output regulation (±1%) across temperature without external trimming. |
| Thermal Shutdown | 160°C with 30°C hysteresis - protects die during sustained overload or poor PCB thermal design while enabling recovery without manual reset. |
Pinout & Package
MP5403GQBU-P is housed in an ultra-thin UTQFN-20 package (2.5mm × 3mm, 0.4mm height) with wettable flanks for automated optical inspection. Pin mapping is validated per MPS MP5403 Rev. 1.0 datasheet (p.15) and confirmed on official Monolithic Power Systems product page.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 CDELAY | PFL delay timing capacitor node | Connects to external capacitor to set PFL low-to-high assertion delay (e.g., 100ns–10ms); floating = minimum delay. |
| 2 PFL_ADJ | Power failure threshold reference input | Accepts resistor divider from monitored rail; trip occurs when voltage drops below 0.6V reference. |
| 3 VIN1 | Main input for 3.5A buck & internal logic | Primary power source; must be ≥2.7V and decoupled locally; enables UVLO-based system wake-up sequencing. |
| 4 AGND | Analog ground reference | Separate from power ground to reduce noise coupling into FB/PG/PFL sensing circuits; requires dedicated PCB pour. |
| 5 GND | Power ground return | High-current return path for SW1/SW2/OUT3; must be low-inductance and thermally connected to thermal pad. |
| 6 VIN2 | Input for 2.5A buck converter | Independent input domain; supports lower-voltage sources (≥2.0V) when VIN1 is active, enabling hybrid supply architectures. |
| 7 FB1 | Output voltage feedback for 3.5A buck | Regulates VOUT1 via external resistor divider; grounding forces 100% duty cycle (bypass mode) for direct pass-through. |
| 8 FB2 | Output voltage feedback for 2.5A buck | Same function as FB1 for Ch2; enables independent output programming or parallel configuration via PG pin tie. |
| 9 EN1 | Enable control for 3.5A buck | Active-high logic (1.05–1.5V threshold); internal 2MΩ pulldown allows float-to-disable; 100µs turn-on delay. |
| 10 EN2 | Enable control for 2.5A buck | Same as EN1 but with independent control; enables staggered startup or fault-isolated shutdown. |
| 11 EN3 | Enable control for load switch | Active-high (1.05–1.5V); 70µs turn-on delay; required to activate PFL supervision functionality. |
| 12 SW2 | Switch node for 2.5A buck | High dv/dt node; requires short, wide copper trace and local high-frequency ceramic cap to minimize EMI and ringing. |
| 13 VSUS | Sustain voltage for output discharge | Bias source for internal 13Ω discharge FET; must be decoupled to GND; enables controlled ramp-down during disable. |
| 14 SW1 | Switch node for 3.5A buck | Higher-current switch node than SW2; demands robust thermal relief and minimized loop area for efficiency and reliability. |
| 15 PG1 | Power good indicator for Ch1 | Open-drain output pulled high when VOUT1 is within ±10% of target; used for downstream enable sequencing or fault flagging. |
| 16 PG2 | Power good indicator for Ch2 | Same behavior as PG1; independent status enables verification of dual-rail readiness before host initialization. |
| 17 PG3 | Power good indicator for load switch | Pulled high only when VIN3 > UVLO AND (VIN3 – VOUT3) ≤ 200mV - confirms low-dropout conduction state. |
| 18 VIN3 | Input for load switch | Supports 0.6V–6V; enables use of battery, backup rail, or secondary DC source for auxiliary loads. |
| 19 OUT3 | Output of load switch | Delivers up to 3A; clamped to ≤5.5V internally to protect downstream components during overvoltage events. |
| 20 PFL | Power failure indicator output | Open-drain signal pulled low immediately upon PFL_ADJ < 0.6V; requires external pull-up for system-level interrupt generation. |
Key Features
| Feature | Design Value |
|---|---|
| Interleaved 180° PWM operation | Reduces input RMS current by ~30% vs. non-interleaved, cutting required input capacitance and PCB footprint. |
| Programmable PFL supervision | Adjustable threshold (via resistor divider) and delay (via CDELAY cap) enable precise brown-out detection across diverse supply rails. |
| Parallel buck capability | Automatic detection via PG1/PG2 tie enables single-EN control of combined 6A output without external OR-ing diodes or controllers. |
| Integrated output discharge | 13Ω internal FET discharges VOUT within ~1ms after disable, preventing floating outputs that could disrupt downstream logic states. |
| Low-RDS(ON) load switch | 20mΩ RDS(ON) limits voltage drop to 60mV at 3A, eliminating need for external MOSFETs in cost-sensitive SSD auxiliary power paths. |
Applications
| Solid-State Drive Core Power | Hybrid Drive Auxiliary Rail |
|---|---|
|
Use Scenario: Powers NAND flash controller core (1.2V) and I/O interface (1.8V) in M.2 NVMe SSDs with tight thermal and space constraints. IC Role / Device Role / Timing Role: Dual-buck PMIC providing independently sequenced, low-noise, high-efficiency DC-DC conversion with PG confirmation before PCIe link training. Use Value: Interleaved operation reduces input ripple to <15mVpp, avoiding interference with high-speed SerDes lanes and meeting PCIe Gen4 power integrity specs. |
Use Scenario: Supplies 3.3V auxiliary rail to HDD spindle motor controller and cache SRAM in 2.5" hybrid drives using shared 5V input. IC Role / Device Role / Timing Role: Load switch (VIN3=5V→OUT3=3.3V) with soft-start and OCP, coordinated with buck rails via EN/PG signals for safe spin-up sequence. Use Value: 20mΩ RDS(ON) delivers 3A with only 60mV dropout, eliminating discrete FET and gate-driver BOM while maintaining >99% efficiency at full load. |
| Portable Storage Device Bias | Low-Voltage System Power |
|
Use Scenario: Powers USB-C portable SSD enclosure logic (1.1V core, 0.9V PHY) from single-cell Li-ion (3.0–4.2V) with minimal external components. IC Role / Device Role / Timing Role: Configurable PMIC with trimmable outputs and ultra-low IQ (85µA) enabling >100-hour standby battery life. Use Value: Light-load DCM mode reduces switching frequency under 10mA load, cutting no-load power to <15µW and extending shelf life. |
Use Scenario: Delivers 0.9V/2.5V dual rails to FPGA-configurable logic in compact industrial data loggers powered from 3.3V or 5V system bus. IC Role / Device Role / Timing Role: Dual-buck regulator with independent EN/PG pins enabling firmware-controlled power-up order and fault isolation per subsystem. Use Value: 100% duty cycle mode (via FB grounding) allows direct pass-through for unregulated 3.3V rail, reducing component count and cost where regulation is unnecessary. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar multi-rail PMIC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MP5479 | Successor IC with higher 4.5A/3.5A buck ratings, 2.2MHz switching, and enhanced thermal performance in same UTQFN-20 package. | Designed for next-gen NVMe SSDs requiring higher current density and faster transient response; supports wider input (2.4V–6V). | Select MP5479 for new designs targeting >4A core rails or tighter thermal envelopes; pin-compatible but requires updated layout for higher-frequency stability. |
| MP5417 | Lower-cost variant with 3A/2A buck outputs, simplified PFL (no CDELAY), and reduced feature set (no parallel mode, no VSUS). | Targeted at cost-sensitive embedded storage where 3A max load and basic sequencing suffice; lacks advanced supervision and discharge control. | Choose MP5417 for legacy SSD upgrades or industrial modules where BOM reduction outweighs advanced supervision needs. |
Compared with MP5403GQBU-P, MP5479 offers higher current capability and frequency for future-proofing, while MP5417 trades supervision features for cost-making MP5403 optimal only for existing designs needing exact replacement with full legacy feature support.
Availability
MP5403GQBU-P is available at Aetrix Electronics and suitable for solid-state drives, hybrid drives, and portable storage devices requiring stable component supply and long-term obsolescence management.
Supply support for MP5403GQBU-P includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and power ICs, with a focus on energy-efficient DC-DC conversion and power management solutions.
The MP5403 belongs to MPS's Mini PMIC product line, engineered specifically for space-constrained storage and portable electronics requiring integrated multi-rail power with supervisory intelligence and minimal external components.
FAQ
What does "NOT RECOMMENDED FOR NEW DESIGNS" mean for MP5403GQBU-P?
This designation indicates Monolithic Power Systems has superseded MP5403GQBU-P with MP5479 and MP5417 for new projects. MP5403GQBU-P remains fully functional and supported for existing designs, with no announced end-of-life date, but lacks roadmap enhancements like higher efficiency or extended temperature range found in successors.
Can MP5403GQBU-P operate with only VIN1 powered?
Yes. When VIN1 exceeds its UVLO threshold (2.5V), it powers internal logic and enables EN1/EN2/EN3 control. VIN2 and VIN3 may remain unpowered until their respective EN pins are asserted, allowing staged power-up of secondary rails without violating absolute maximum ratings.
How is parallel mode activated between the two buck regulators?
Parallel mode is auto-detected during a 50µs window after startup if PG1 and PG2 are externally tied together. The IC measures PG1 voltage: <150mV triggers parallel operation (EN1 controls both channels), while >150mV maintains independent control (EN1/EN2 separate). No configuration register or external command is needed.
What is the purpose of the VSUS pin, and how should it be decoupled?
VSUS biases the internal 13Ω output discharge FET. It must be decoupled with a 1µF X5R ceramic capacitor placed within 2mm of the pin and connected directly to AGND. Failure to properly decouple VSUS causes slow or incomplete VOUT discharge during shutdown, risking latch-up in downstream logic.
Does MP5403GQBU-P support forced PWM mode, or is pulse-skipping default?
MP5403GQBU-P uses proprietary pulse-skip mode at light loads to maximize efficiency; forced PWM is not supported. At loads above ~200mA, it operates in continuous conduction mode (CCM) at ~1.5MHz. Below that, switching frequency drops dynamically, reducing switching losses while maintaining regulation via zero-current detection.
What happens to PG3 if the load switch output is shorted to ground?
If OUT3 shorts to GND while VIN3 is present, PG3 pulls low immediately because the VIN3–VOUT3 differential exceeds 200mV. This provides fast fault indication to the host processor, enabling immediate disable via EN3 and preventing thermal damage to the 20mΩ switch FET.
Is the 100% duty cycle mode (via FB grounding) protected against overvoltage?
Yes. In 100% duty cycle mode, the buck regulator becomes a low-impedance pass element, but the internal 5.5V clamp on OUT3 remains active. If VIN exceeds 5.5V, the clamp engages to protect downstream 3.3V or 1.8V logic, limiting maximum output to 5.5V regardless of input.
MP5403GQBU-P Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Monolithic Power Systems Inc.
- Series:
- -
- Package/Case:
- 20-UFQFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Not For New Designs
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable (Fixed)
- Number of Outputs:
- 2
- Voltage - Input (Min):
- 2.7V
- Voltage - Input (Max):
- 6V
- Voltage - Output (Min/Fixed):
- 0.6V
- Voltage - Output (Max):
- 6V
- Current - Output:
- 3.5A, 2.5A
- Frequency - Switching:
- 1.5MHz
- Synchronous Rectifier:
- No
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 20-UTQFN (2.5x3)
MP5403GQBU-P FAQ
1.How can I place an order for MP5403GQBU-P through Aetrix?
Please submit a Request for Quotation (RFQ) for MP5403GQBU-P on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MP5403GQBU-P reliable?
The price and inventory of MP5403GQBU-P are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MP5403GQBU-P is usually 5 days.
3.What payment methods are accepted for MP5403GQBU-P?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MP5403GQBU-P transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MP5403GQBU-P?
MP5403GQBU-P orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MP5403GQBU-P order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MP5403GQBU-P?
For technical support, including MP5403GQBU-P datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MP5403GQBU-P requirements.
6.How does Aetrix verify that MP5403GQBU-P is sourced from the original manufacturer or authorized distributors?
All MP5403GQBU-P products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MP5403GQBU-P meets industry standards.
7.What is the process for return or replacement of MP5403GQBU-P?
All MP5403GQBU-P units undergo pre-shipment inspection (PSI). If there is an issue with MP5403GQBU-P, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MP5403GQBU-P part is unused and in its original packaging.
Return procedure for MP5403GQBU-P:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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