Monolithic Power Systems Inc. MP5611GQT-Z

Overview

MP5611GQT-Z from Monolithic Power Systems is a triple-output AMOLED display power supply IC integrating a boost converter for ELVDD (4.6V/500mA), an inverting buck-boost (IBB) for ELVSS (−4V/500mA), and a second boost for AVDD (5.8V/100mA), operating from 2.9V to 5.2V input. It features one-wire digital control via CTRL pin, independent AVDD/ELVDD enable (EN_AVDD/CTRL), fast discharge (FD), and comprehensive protection including OCP, short-to-GND, and thermal shutdown. Used in compact smartphone AMOLED panels requiring precise, sequenced bias rails.

For engineers reviewing the MP5611GQT-Z datasheet, MP5611GQT-Z pinout, MP5611GQT-Z application, or MP5611GQT-Z equivalent, this page delivers verified specifications, validated pin functions, confirmed AMOLED display use cases, and real-world alternative part comparisons - all grounded in Monolithic Power Systems' Rev. 1.0 datasheet and official package documentation.

Technical Context

The MP5611GQT-Z implements three independent switching regulators in a single TQFN-16 die: ELVDD and AVDD use synchronous boost topologies (fSW = 1.35MHz), while ELVSS uses a synchronous inverting buck-boost (fSW = 1.7MHz). Each output has dedicated current-limit thresholds (ELVDD OCP: 80–650mA; AVDD OCP: 90–270mA), configurable via 81-pulse CTRL protocol, and separate startup timing (AVDD enabled by EN_AVDD; ELVDD/ELVSS triggered by CTRL with 10ms stagger).

Its protection architecture includes cycle-by-cycle current limiting, output short detection with millisecond-level response (e.g., 1ms for ELVDD short-to-GND), UVLO (2.65V rising edge), and thermal shutdown (150°C with 25°C hysteresis). The exposed thermal pad must be connected to AGND for thermal management, and CT pin allows external capacitor-based ELVSS transition time tuning (e.g., 100nF ≈ 90ms).

Key Specifications

Pinout & Package

TQFN-16 (3mm × 3mm) package with exposed thermal pad connected to AGND. Pin 1 marked by dot; pin numbering follows standard counter-clockwise top-view layout.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar AMOLED display power supply applications.

Compared with RTQ2132B-QT and TPS65136IRGER, MP5611GQT-Z uniquely combines triple-rail integration, one-wire digital configurability, and 500mA ELVSS/ELVDD drive in a 3mm×3mm footprint - making it optimal for space-constrained smartphones requiring flexible, production-tunable bias sequencing without added communication overhead.

Availability

MP5611GQT-Z is available at Aetrix Electronics and suitable for AMOLED smartphone panels, wearable displays, and automotive instrument clusters requiring stable component supply, guaranteed RoHS/lead-free compliance, and long-term lifecycle support.

Supply support for MP5611GQT-Z includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-efficiency power management ICs, with over 20 years of expertise in DC-DC conversion and display power solutions.

The MP5611 belongs to MPS's AMOLED Display Power Supply product line, designed specifically to replace multi-chip bias solutions in compact mobile displays by integrating ELVDD, ELVSS, and AVDD generation with digital configurability and robust protection.

FAQ

What is the function of the CT pin on MP5611GQT-Z?

The CT pin configures ELVSS output transition time using an external capacitor. With an internal 300kΩ resistor, a 100nF capacitor yields ~90ms ramp time (t = 3 × R × C). This prevents inrush current and display artifacts during ELVSS voltage slewing, especially critical in high-resolution panels where abrupt bias changes cause visible flicker.

How does the CTRL pin enable both configuration and sequencing?

CTRL serves dual roles: as a digital interface (pulse-count protocol sets voltages/OCP), and as an enable signal. Pulling CTRL high starts ELVDD immediately; ELVSS begins 10ms later. A power cycle resets all settings to defaults (ELVSS = −4V, ELVDD = 4.6V, AVDD = 5.8V), while holding CTRL low for >10ms resets ELVDD/ELVSS only.

Can MP5611GQT-Z operate with input voltage near ELVDD output?

Yes - when VIN ≈ ELVDD (e.g., 4.3–4.5V), the ELVDD boost enters diode mode: the high-side FET disables and its body diode acts as a rectifier. This maintains regulation in continuous conduction mode (CCM), though efficiency drops ~3–5% versus normal boost operation due to forward voltage loss.

What is the purpose of the FD pin, and how is it used?

FD enables active fast discharge of all outputs (ELVDD, ELVSS, AVDD) during shutdown. Pulling FD high activates internal discharge FETs (RDS_ELVDD = 75Ω, RDC_ELVSS = 150Ω, RDS_AVDD = 30Ω), collapsing voltages within milliseconds. Leaving FD low places outputs in high-impedance state - useful when external discharge circuits are preferred.

How does MP5611GQT-Z handle ELVDD-to-ELVSS short detection?

It monitors ELVSS voltage relative to ELVDD during startup: if ELVSS exceeds 250mV within 10ms of CTRL activation, the IC shuts down ELVDD and ELVSS (but keeps AVDD active). This detects catastrophic shorts between anode and cathode rails before panel damage occurs, with hardware-level response independent of software control.

Is the exposed thermal pad required to be soldered?

Yes - the exposed pad must be soldered to AGND and connected to a thermal copper pour. Per datasheet, it is electrically tied to AGND and critical for thermal performance: θJA drops from 60°C/W (no pad connection) to ≤35°C/W with 4 thermal vias and 1-in² copper area, preventing thermal shutdown under full 500mA ELVDD/ELVSS load.

What inductor values are recommended for each output?

MPS specifies 4.7µH for ELVDD (L1) and ELVSS (L2), and 10µH for AVDD (L3). These values balance efficiency, size, and transient response: 4.7µH enables <1.5ms ELVDD startup time, while 10µH limits AVDD peak current to sustain 100mA output with <10mV ripple at 50mA load.