Monolithic Power Systems Inc. MP6002DN-LF-P
- Part No.:
- MP6002DN-LF-P
- Manufacturer:
- Monolithic Power Systems Inc.
- Package:
- 8-SOIC (0.154", 3.90mm Width) Exposed Pad
- Datasheet:
-
MP6002DN-LF-P.pdf
- Description:
- IC REG FLYBACK ADJ 8SOICE
- Quantity:
- Payment:

- Shipping:

Inventory:1,420
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
MP6002DN-LF-P from Monolithic Power Systems is a monolithic flyback/forward DC-DC controller IC integrating a 150V/0.45Ω N-channel power MOSFET, supporting up to 30W output power, fixed-frequency peak-current-mode control, and direct optocoupler feedback interface for isolated designs. It operates across 10V–100V input, delivers regulated 5V@3A in telecom PoE applications, and features auto-restart, thermal shutdown, and zero-load regulation.
For engineers reviewing the MP6002DN-LF-P datasheet, MP6002DN-LF-P pinout, MP6002DN-LF-P application, or MP6002DN-LF-P equivalent, key selection criteria include its 150V switch rating, programmable 55–550 kHz oscillator, line UV/OV detection thresholds (1.21V/3.0V), integrated soft-start, and SOIC8E thermally enhanced package with exposed pad.
Technical Context
The MP6002DN-LF-P implements fixed-frequency peak-current-mode PWM control with internal slope compensation, cycle-by-cycle current limiting, and duty-cycle limiting via line feed-forward (DMAX = 67.5% at VLINE = 1.3V, decreasing linearly with rising input). Its error amplifier has a 1.21V reference, 60 dB DC gain, and 1 MHz bandwidth, enabling stable loop compensation for isolated flyback topologies.
It integrates a 100V high-voltage startup circuit sourcing bias from VIN to charge VCC (4.5–6.0V operating window), supports external synchronization via RT pin, and provides hiccup-mode overcurrent protection triggered when FB falls >33% below 1.21V - critical for short-circuit survival in telecom power supplies.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Integrated Switch | 150V rated, 0.45Ω RDS(on) N-MOSFET - enables single-chip 30W flyback without external HV FET |
| Switching Frequency | Programmable 55–550 kHz via RT resistor - balances transformer size vs. switching loss in 36–72V telecom inputs |
| Feedback Reference | 1.21V ±5% internal reference - sets output voltage accuracy in optocoupler-coupled or primary-side regulation |
| Line Monitoring | UVLO threshold 1.21V (hysteresis 100 mV); OVLO threshold 3.0V (hysteresis 300 mV) - ensures safe operation across 36–72V PoE range |
| Thermal Protection | 150°C shutdown with 30°C hysteresis - prevents permanent damage during sustained overload or poor heatsinking |
| Startup Circuit | 100V-rated internal bias generator - eliminates external HV start-up resistor, reduces BOM count in isolated converters |
| Current Limit | 4A typical cycle-by-cycle peak limit - protects transformer and rectifier under transient overloads and short circuits |
Pinout & Package
MP6002DN-LF-P is housed in a thermally enhanced SOIC-8 exposed-pad package (SOIC8E), optimized for high-power density flyback designs with low θJA = 50°C/W on 4-layer board.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 GND | Power return and reference node | Primary ground reference for all analog and power circuits; must connect to thermal pad for optimal heat dissipation |
| 2 LINE | UV/OV sense and enable/disable control | Input line monitor input; grounding disables controller - used for remote ON/OFF or precise UV/OV threshold setting |
| 3 FB | Feedback input to error amplifier | Inverting input referenced to 1.21V; accepts optocoupler output or resistive divider for isolated/primary-side regulation |
| 4 COMP | Error amplifier output | Drives external compensation network; source/sink capability (±2 mA) supports Type II compensation for stability |
| 5 RT | Oscillator timing and sync input | Connects to GND via resistor for frequency setting (55–550 kHz); accepts external clock > fINT for synchronization |
| 6 VCC | Bias supply input | 4.5–6.0V operating range; requires ≥1 µF capacitor to GND; clamped internally at 8V |
| 7 VIN | High-voltage startup supply | 100V-rated input sourcing startup current; disconnects after VCC reaches 6.0V to minimize quiescent loss |
| 8 SW | Power switch drain node | 150V-rated switching node; connects to transformer primary; carries full primary current and voltage stress |
Key Features
| Feature | Design Value |
|---|---|
| Direct optocoupler interface | Bypasses internal error amplifier to support industry-standard isolated feedback without external op-amp |
| Zero-load regulation | Active cycle-skipping mode maintains ±5% output regulation at no load - eliminates need for dummy loads in PoE endpoints |
| Duty-cycle limiting with line feed-forward | Reduces DMAX from 67.5% to ~58% across 36–72V input - prevents transformer saturation and improves line transient immunity |
| Hiccup-mode overcurrent protection | 15-cycle VCC ramp restart sequence limits average short-circuit input current - reduces thermal stress during fault conditions |
| Integrated soft-start | Internal 10 ms soft-start ramp prevents inrush current and output overshoot during power-up |
Applications
| Telecom Power Supply | Power over Ethernet (PoE) PSE |
|---|---|
|
Use Scenario: 48V input isolated DC-DC conversion for line cards in central office equipment. IC Role / Device Role / Timing Role: Primary-side flyback controller managing transformer drive, regulation, and protection. Use Value: Integrated 150V switch and line monitoring ensure reliable operation across -40°C to +85°C telecom temperature range with no external HV components. |
Use Scenario: Auxiliary power supply for IEEE 802.3af/at PSE controllers requiring 5V/3A isolated output. IC Role / Device Role / Timing Role: Regulated flyback controller delivering stable 5V rail to PSE PHY and classification circuitry. Use Value: Zero-load regulation and hiccup-mode OCP meet PoE Class 3/4 safety requirements while minimizing standby power. |
| VoIP Phone Power | Distributed Telecom DC-DC |
|
Use Scenario: Single-ended forward converter powering VoIP phone baseband and codec from 48V phantom power. IC Role / Device Role / Timing Role: Forward topology controller with synchronous rectification support and precise 1.21V feedback reference. Use Value: Programmable 200–300 kHz switching frequency optimizes efficiency and EMI in compact handset PCB layouts. |
Use Scenario: Point-of-load (POL) converter in distributed power architecture for remote radio units (RRUs). IC Role / Device Role / Timing Role: High-input-voltage flyback controller providing isolated 5V/3A for FPGA and RF front-end bias rails. Use Value: Thermal shutdown and auto-restart protect against airflow loss or ambient temperature excursions in outdoor enclosures. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar flyback/forward controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| UCC28740DR | 65V max switch, no integrated FET; requires external HV MOSFET and auxiliary winding for VCC | Better suited for <20W designs with tighter cost targets where external FET selection is preferred | Select UCC28740DR if designing for <65V input or requiring variable-frequency quasi-resonant operation |
| ICE2QS03G | 700V integrated BJT, fixed 65 kHz, no programmable frequency or line feed-forward | Targeted at universal AC-DC adapters, not optimized for 36–72V telecom DC inputs | Choose ICE2QS03G only for legacy AC-DC flyback designs where BJT-based cost leadership outweighs efficiency needs |
Compared with UCC28740DR and ICE2QS03G, MP6002DN-LF-P uniquely combines 150V integration, programmable frequency, line feed-forward, and zero-load regulation - making it the only single-package solution qualified for 36–72V PoE and telecom DC-DC applications requiring high reliability and minimal external components.
Availability
MP6002DN-LF-P is available at Aetrix Electronics and suitable for telecom infrastructure, Power over Ethernet (PoE) systems, and distributed DC-DC conversion requiring stable component supply, long-lifecycle support, and RoHS-compliant packaging.
Supply support for MP6002DN-LF-P includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and power ICs, with design centers in the US, China, and Taiwan, and global manufacturing partnerships.
The MP6002 belongs to MPS's monolithic DC-DC controller product line, engineered specifically for high-efficiency, compact isolated power conversion in telecom, enterprise networking, and industrial DC-fed systems.
FAQ
What is the maximum continuous output power achievable with MP6002DN-LF-P?
The MP6002DN-LF-P is rated for up to 30W continuous output power in properly heatsinked SOIC8E layouts with adequate PCB copper area under the exposed pad. This assumes 48V input, 5V/3A output, 200 kHz switching, and >85% measured efficiency - verified in MPS EV6002DN reference design under +25°C ambient with forced air cooling.
Can MP6002DN-LF-P operate without an auxiliary winding for VCC bias?
Yes - its integrated 100V startup circuit draws initial bias from VIN (pin 7) to charge VCC (pin 6) until 6.0V is reached, then disconnects. Once running, VCC can be sustained by an auxiliary winding, but it is not required for initial startup or steady-state operation in designs where VIN remains ≥10V.
How does the LINE pin function in overvoltage and undervoltage protection?
The LINE pin monitors input voltage via an external resistor divider. At 1.21V (typical), UVLO triggers shutdown; at 3.0V (typical), OVLO triggers shutdown. Hysteresis is 100 mV for UVLO and 300 mV for OVLO. Grounding the LINE pin forces immediate disable - enabling use as a hardware enable signal.
What is the purpose of the RT pin beyond frequency setting?
RT serves dual functions: (1) oscillator timing via resistor-to-GND (55–550 kHz), and (2) external clock synchronization input. When driven with 3.5–5.5V pulses (50–150 ns wide) exceeding internal fSW, it forces exact phase alignment - essential for EMI reduction in multi-rail telecom systems.
Does MP6002DN-LF-P support primary-side regulation (PSR) without an optocoupler?
No - the MP6002DN-LF-P requires either optocoupler-coupled feedback (bypassing internal error amp) or resistive divider feedback to FB pin. It lacks built-in PSR algorithms, auxiliary winding sensing, or demagnetization detection needed for true optocoupler-less regulation.
What thermal derating applies above +85°C ambient?
Maximum power dissipation decreases linearly above +85°C per θJA = 50°C/W: PDMAX = (150°C − TA) / 50. At +100°C ambient, max continuous power drops to 1W. For extended high-temp operation, use minimum 2 oz copper on both layers under the exposed pad and add thermal vias.
Is MP6002DN-LF-P pin-compatible with earlier MP6002 variants?
Yes - MP6002DN-LF-P shares identical SOIC8E footprint, pinout, and electrical specifications with MP6002DN and MP6002DN-Z. The "-LF" suffix denotes lead-free/RoHS-compliant finish; no functional or mechanical differences exist between these variants.
MP6002DN-LF-P Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Monolithic Power Systems Inc.
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width) Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Up/Step-Down
- Output Configuration:
- Positive
- Topology:
- Flyback, Forward Converter
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 4.5V, 10V
- Voltage - Input (Max):
- 6V, 100V
- Voltage - Output (Min/Fixed):
- -
- Voltage - Output (Max):
- 150V
- Current - Output:
- -
- Frequency - Switching:
- 55kHz ~ 550kHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOICE
MP6002DN-LF-P FAQ
1.How can I place an order for MP6002DN-LF-P through Aetrix?
Please submit a Request for Quotation (RFQ) for MP6002DN-LF-P on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MP6002DN-LF-P reliable?
The price and inventory of MP6002DN-LF-P are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MP6002DN-LF-P is usually 5 days.
3.What payment methods are accepted for MP6002DN-LF-P?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MP6002DN-LF-P transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MP6002DN-LF-P?
MP6002DN-LF-P orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MP6002DN-LF-P order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MP6002DN-LF-P?
For technical support, including MP6002DN-LF-P datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MP6002DN-LF-P requirements.
6.How does Aetrix verify that MP6002DN-LF-P is sourced from the original manufacturer or authorized distributors?
All MP6002DN-LF-P products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MP6002DN-LF-P meets industry standards.
7.What is the process for return or replacement of MP6002DN-LF-P?
All MP6002DN-LF-P units undergo pre-shipment inspection (PSI). If there is an issue with MP6002DN-LF-P, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MP6002DN-LF-P part is unused and in its original packaging.
Return procedure for MP6002DN-LF-P:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
MP6002DN-LF-P Tags

-
TPS562201DDCR
Texas Instruments

-
MC34063ABD-TR
STMicroelectronics

-
TPS561201DDCR
Texas Instruments

-
MC33063ADR
Texas Instruments

-
MC34063ADR
Texas Instruments
-
TPS560200DBVR
Texas Instruments

-
AP3012KTR-G1
Diodes Incorporated

-
TLV61048DBVR
Texas Instruments

-
AZ34063UMTR-G1
Diodes Incorporated

-
TPS562200DDCR
Texas Instruments

-
AP62300TWU-7
Diodes Incorporated

-
MC34063EBD-TR
STMicroelectronics
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

