Monolithic Power Systems Inc. MP6400DG-09-LF-Z
- Part No.:
- MP6400DG-09-LF-Z
- Manufacturer:
- Monolithic Power Systems Inc.
- Category:
- Supervisors
- Package:
- 6-VDFN Exposed Pad
- Datasheet:
-
MP6400DG-09-LF-Z.pdf
- Description:
- IC SUPERVISOR 1 CHANNEL 6QFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
MP6400DG-09-LF-Z from Monolithic Power Systems is a fixed-threshold supervisory circuit with 0.84V SENSE voltage threshold, ±1% threshold accuracy, 1.6μA typical quiescent current, and programmable reset delay from 2.1ms to 10s via external capacitor on CDELAY pin. It monitors 0.9V system rails in battery-powered microcontroller systems requiring reliable power-on reset and manual reset assertion.
For engineers reviewing the MP6400DG-09-LF-Z datasheet, MP6400DG-09-LF-Z pinout, MP6400DG-09-LF-Z application, or MP6400DG-09-LF-Z equivalent, key selection criteria include guaranteed RESET validity down to VCC = 0.8V, open-drain RESET output compatible with 6V pull-up, immunity to 17.5µs SENSE transients, and factory-set 0.84V threshold for 0.9V nominal supply monitoring.
Technical Context
The MP6400DG-09-LF-Z implements a precision voltage monitor with internal 140nA current source charging an external capacitor on CDELAY to generate user-programmable reset delays. Its comparator-based sensing architecture includes 1.5–3.5% hysteresis (VHYS) to reject noise on the SENSE input.
It features dual reset triggers: falling SENSE voltage below 0.84V (±1% accuracy) or logic-low assertion on MR pin (VIH = 0.7×VCC, VIL = 0.25×VCC), with MR internally pulled up to VCC via 90kΩ resistor. RESET remains asserted until both conditions clear and the programmed delay expires.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| SENSE Threshold Voltage (VIT) | 0.84V ±1% - factory-trimmed for accurate 0.9V rail monitoring with minimal tolerance drift over temperature. |
| Quiescent Current (ICC) | 1.6μA typ at 3.3V - enables multi-year operation in coin-cell–powered IoT sensors and wearables. |
| RESET Delay Range | 2.1ms–10s via CDELAY-to-GND capacitor - supports boot timing compliance across ARM Cortex-M, RISC-V, and FPGA platforms. |
| RESET Output Type | Open-drain - allows level-shifting to 6V logic domains and wired-OR reset bus configurations. |
| Minimum Valid VCC | 0.8V - ensures deterministic reset assertion during brown-out recovery before core logic becomes unstable. |
| SENSE Transient Immunity | 17.5µs max duration at 5% overdrive - rejects ESD-induced glitches without false resets. |
| MR Input Pull-up | 90kΩ internal - eliminates need for external pull-up in simple manual reset button interfaces. |
Pinout & Package
MP6400DG-09-LF-Z is housed in a 2mm × 2mm QFN-6 package with exposed thermal pad, optimized for space-constrained portable PCB layouts and thermal performance (θJA = 50°C/W).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC (Pin 1) | Supply input | Accepts 1.8–6V; requires 0.1µF ceramic decoupling adjacent to pin for stable internal reference operation. |
| SENSE (Pin 2) | Monitored voltage input | Direct connection to 0.9V rail; 2.4µA max input current at 6V ensures minimal loading on low-power LDO outputs. |
| CDELAY (Pin 3) | Delay time programming node | Connects to GND via capacitor (≥150pF) to set delay; floating = 24ms, tied to VCC = 380ms - no external resistor needed for fixed modes. |
| MR (Pin 4) | Manual reset input | Active-low control with 0.25×VCC logic-low threshold; internal 90kΩ pull-up enables pushbutton-only interface without external components. |
| GND (Pin 5) | Ground reference | Primary return path for internal bias and SENSE comparator; must be low-impedance connection to system ground plane. |
| RESET (Pin 6) | Open-drain reset output | Drives low when triggered; requires external pull-up ≥10kΩ; supports 6V-tolerant operation for mixed-voltage systems. |
Key Features
| Feature | Design Value |
|---|---|
| Factory-set 0.84V threshold | Eliminates external resistor divider for 0.9V rail monitoring, reducing BOM count and layout area by 3 components. |
| 1.6μA quiescent current | Enables >10-year battery life in always-on BLE sensor nodes powered by CR2032 cells. |
| Guaranteed RESET validity to 0.8V VCC | Ensures reset assertion remains active during deep brown-out, preventing processor lockup before supply recovery. |
| 17.5µs SENSE transient immunity | Rejects fast ESD pulses on power rails without requiring additional RC filtering or TVS devices. |
| Open-drain RESET with 6V tolerance | Permits direct interfacing to 3.3V, 5V, or mixed-voltage microcontrollers without level translators. |
Applications
| Battery-Powered Wearables | FPGA Configuration Monitoring |
|---|---|
Use Scenario: Continuous heart-rate monitoring in wrist-worn fitness trackers powered by rechargeable Li-ion cells. IC Role / Device Role / Timing Role: Supervises 0.9V core voltage of ultra-low-power MCU; asserts RESET during cold-start or battery sag to prevent corrupted sensor data logging. Use Value: 1.6μA ICC extends runtime between charges; ±1% VIT ensures reliable detection of 100mV droop on 0.9V rail under load transients. | Use Scenario: Power sequencing validation in industrial FPGA-based motor controllers with multi-rail supplies. IC Role / Device Role / Timing Role: Monitors 0.9V auxiliary rail feeding FPGA configuration memory; delays RESET deassertion 100ms to allow bitstream loading before logic initialization. Use Value: CDELAY capacitor programming enables precise alignment with FPGA vendor's TCONFIG specification without firmware changes. |
| Medical Point-of-Care Diagnostics | Automotive Body Control Modules |
Use Scenario: Portable blood glucose meters operating from single AAA alkaline cells with declining voltage profile. IC Role / Device Role / Timing Role: Detects end-of-life battery drop below 0.84V threshold and holds MCU in reset to prevent erroneous test result display. Use Value: Guaranteed RESET operation down to VCC = 0.8V ensures fail-safe behavior even as battery voltage collapses below nominal rating. | Use Scenario: Low-power CAN gateway modules sleeping in vehicle off-mode with 12V-to-0.9V DC/DC conversion. IC Role / Device Role / Timing Role: Supervises 0.9V digital core rail; uses MR pin to synchronize reset with ignition signal edge for deterministic wake-up timing. Use Value: Internal 90kΩ MR pull-up reduces component count; 17.5µs SENSE immunity prevents false resets from alternator ripple noise. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar supervisory circuit applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS3808G01QDBVRQ1 | Fixed 0.8V threshold, 1.1μA ICC, 200ms–10s delay via resistor; AEC-Q100 qualified | Automotive-grade qualification required; lacks SENSE transient immunity spec | Select for automotive body electronics needing IATF 16949-compliant supply monitoring. |
| MAX6326UT29D3+ | 0.82V threshold, 2.5μA ICC, fixed 200ms delay; no CDELAY programmability | Cost-sensitive consumer designs where delay flexibility is unnecessary | Choose when board space is constrained and fixed delay suffices-no capacitor footprint needed. |
Compared with TPS3808G01QDBVRQ1 and MAX6326UT29D3+, MP6400DG-09-LF-Z offers superior quiescent current efficiency and SENSE transient immunity for portable medical and industrial edge devices, while trading AEC-Q100 certification and fixed-delay simplicity for programmable timing flexibility.
Availability
MP6400DG-09-LF-Z is available at Aetrix Electronics and suitable for battery-powered wearables, FPGA configuration monitoring, medical point-of-care diagnostics, and automotive body control modules requiring stable component supply across extended production lifecycles.
Supply support for MP6400DG-09-LF-Z includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-efficiency analog and power ICs for computing, industrial, automotive, and communications markets.
The MP6400 product line delivers ultra-low-power supervisory circuits optimized for battery-critical applications where sub-2μA quiescent current, precise voltage thresholds, and flexible reset timing are mandatory design requirements.
FAQ
What is the exact SENSE voltage threshold for MP6400DG-09-LF-Z?
The MP6400DG-09-LF-Z has a factory-trimmed SENSE threshold voltage (VIT) of 0.84V with ±1% accuracy over –40°C to +85°C ambient temperature. This value is specified in the Standard Versions table of the datasheet and corresponds to nominal 0.9V rail monitoring with 6% headroom for tolerance and drift.
Can MP6400DG-09-LF-Z operate with VCC below 1.8V?
No - the recommended operating condition specifies minimum VCC = 1.8V. However, the device guarantees RESET assertion remains valid down to VCC = 0.8V, meaning it will hold RESET active during brown-out events below 1.8V, but full functional operation (e.g., delay timing, threshold comparison) is only assured above 1.8V.
How do I configure a 5-second reset delay using CDELAY?
To achieve ~5s delay, connect a 4.7nF ceramic capacitor between CDELAY (Pin 3) and GND (Pin 5). Using the formula td ≈ 4.99 × 10⁷ × CDELAY (in farads), a 4.7nF cap yields ~234ms; for 5s, use ~100nF. Confirm with oscilloscope measurement, as stray capacitance affects accuracy.
Is an external pull-up resistor required on the RESET pin?
Yes - RESET is open-drain and requires an external pull-up resistor ≥10kΩ to a logic-compatible voltage (up to 6V). The datasheet specifies this to ensure proper rise time and noise immunity; omitting it leaves RESET floating and causes undefined microprocessor behavior.
Does MP6400DG-09-LF-Z support monitoring voltages other than 0.9V?
No - MP6400DG-09-LF-Z is factory-configured for 0.84V threshold targeting 0.9V rails. For adjustable monitoring (e.g., 1.2V, 1.8V), select MP6400DG-01 or MP6400DJ-01 variants with external resistor divider capability; the -09 suffix denotes fixed 0.9V optimization.
What is the maximum capacitive load allowed on the SENSE pin?
The datasheet recommends a 1nF–10nF bypass capacitor on SENSE for noise immunity. While not explicitly rated for maximum load, exceeding 10nF risks slowing response time beyond the 17.5µs transient immunity window and may cause delayed reset assertion during rapid voltage drops.
How does the MR pin behave when left unconnected?
MR is internally pulled up to VCC via 90kΩ, so an unconnected MR remains logic-high and does not trigger RESET. This allows pushbutton-to-ground implementation without external pull-up resistors - pressing the button pulls MR to GND, asserting RESET immediately regardless of SENSE state.
MP6400DG-09-LF-Z Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Monolithic Power Systems Inc.
- Series:
- -
- Package/Case:
- 6-VDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Simple Reset/Power-On Reset
- Number of Voltages Monitored:
- 1
- Voltage - Threshold:
- 0.84V
- Output:
- Open Drain or Open Collector
- Reset:
- Active Low
- Reset Timeout:
- Adjustable/Selectable
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-QFN (2x2)
MP6400DG-09-LF-Z FAQ
1.How can I place an order for MP6400DG-09-LF-Z through Aetrix?
Please submit a Request for Quotation (RFQ) for MP6400DG-09-LF-Z on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MP6400DG-09-LF-Z reliable?
The price and inventory of MP6400DG-09-LF-Z are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MP6400DG-09-LF-Z is usually 5 days.
3.What payment methods are accepted for MP6400DG-09-LF-Z?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MP6400DG-09-LF-Z transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MP6400DG-09-LF-Z?
MP6400DG-09-LF-Z orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MP6400DG-09-LF-Z order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MP6400DG-09-LF-Z?
For technical support, including MP6400DG-09-LF-Z datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MP6400DG-09-LF-Z requirements.
6.How does Aetrix verify that MP6400DG-09-LF-Z is sourced from the original manufacturer or authorized distributors?
All MP6400DG-09-LF-Z products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MP6400DG-09-LF-Z meets industry standards.
7.What is the process for return or replacement of MP6400DG-09-LF-Z?
All MP6400DG-09-LF-Z units undergo pre-shipment inspection (PSI). If there is an issue with MP6400DG-09-LF-Z, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MP6400DG-09-LF-Z part is unused and in its original packaging.
Return procedure for MP6400DG-09-LF-Z:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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