Monolithic Power Systems Inc. MP6400DG-33-LF-Z

Overview

MP6400DG-33-LF-Z from Monolithic Power Systems is a fixed-threshold supervisory circuit with 3.3V nominal SENSE voltage (VIT = 3.07V), ±1% threshold accuracy, 1.6μA typical quiescent current, and programmable reset delay from 2.1ms to 10s via external capacitor on CDELAY pin. It delivers open-drain RESET assertion during undervoltage or manual reset events in battery-powered microcontroller systems.

For engineers reviewing the MP6400DG-33-LF-Z datasheet, MP6400DG-33-LF-Z pinout, MP6400DG-33-LF-Z application, or MP6400DG-33-LF-Z equivalent, key selection criteria include guaranteed RESET validity down to VCC = 0.8V, immunity to ≤17.5µs negative SENSE transients, and compatibility with 3.3V rail monitoring in portable electronics requiring low-power supervision.

Technical Context

The MP6400DG-33-LF-Z integrates a precision voltage reference and comparator to monitor SENSE voltage against a factory-trimmed 3.07V threshold with ±1% accuracy over –40°C to +85°C. Its internal 140nA current source charges an external capacitor on CDELAY to generate user-defined reset delays.

RESET output is open-drain with 0.4V max VOL at 1.0mA sink current and supports pull-up voltages up to 6V-exceeding VCC. MR input features a 90kΩ internal pull-up and responds to logic-low transitions below 0.25×VCC, enabling coordinated reset sequencing across multiple power domains.

Key Specifications

Pinout & Package

MP6400DG-33-LF-Z is housed in a RoHS-compliant, lead-free 2mm × 2mm QFN-6 package with exposed thermal pad. Pin 1 is marked by a dot or notch; package meets JEDEC MO-229 VCCC standard.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar supervisory circuit applications.

Compared with TPS3808G33DBVR and MAX6326UT33+T, MP6400DG-33-LF-Z uniquely combines ultra-low ICC (1.6μA), SENSE transient immunity (17.5µs), and three-mode delay programming-including capacitor-tuned precision-while maintaining open-drain flexibility and guaranteed 0.8V VCC operation.

Availability

MP6400DG-33-LF-Z is available at Aetrix Electronics and suitable for battery-powered microcontrollers, laptop power sequencing, FPGA configuration monitoring, and industrial PLC I/O modules requiring stable component supply across extended temperature ranges.

Supply support for MP6400DG-33-LF-Z includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and power ICs, with design centers in the US, China, and Taiwan.

The MP6400 product line delivers ultra-low-power, precision voltage supervision for portable and embedded systems-designed specifically to extend battery life while ensuring robust reset behavior under noisy or marginal supply conditions.

FAQ

What is the exact SENSE threshold voltage for MP6400DG-33-LF-Z?

The MP6400DG-33-LF-Z has a factory-trimmed SENSE threshold voltage (VIT) of 3.07V with ±1% accuracy over –40°C to +85°C. This value is specified in the Standard Versions table of the datasheet and confirmed by electrical characterization at TA = +25°C and across full operating temperature range.

Can the reset delay be set to exactly 100ms using an external capacitor?

Yes. Using the formula td ≈ (4.99 × 10⁷ × CDELAY) − 10⁴ (with CDELAY in farads), a 2.02nF capacitor yields ~100ms delay. The datasheet confirms 10nF gives 102ms typical, so 2.02nF is within the 150pF–10nF validated range and achieves precise 100ms timing without trimming.

Is the MR pin compatible with 1.8V logic signals?

Yes. MR logic-low threshold is 0.25×VCC, so at VCC = 1.8V, MR asserts RESET when pulled below 0.45V. At VCC = 3.3V, the threshold is 0.825V. The internal 90kΩ pull-up ensures MR floats high if left unconnected, making it compatible with 1.8V, 2.5V, and 3.3V logic families.

Does MP6400DG-33-LF-Z require an external pull-up resistor on the RESET pin?

Yes. RESET is open-drain and must be pulled up externally with ≥10kΩ to a voltage up to 6V. The datasheet specifies this requirement in the Application Information section and notes that pull-up voltage may exceed VCC, enabling interface with higher-voltage logic domains.

What is the minimum VCC required for RESET to remain valid?

RESET remains valid down to VCC = 0.8V, as stated in the Absolute Maximum Ratings and confirmed in the Electrical Characteristics table under "Power-up Reset Voltage." Below 0.8V, RESET behavior is undefined-ensuring fail-safe assertion during brown-out before MCU functional collapse.

How does the SENSE pin handle noise in high-EMI environments?

The SENSE pin includes built-in hysteresis (VHYS = 1.5–3.5% of VIT) and supports external 1nF–10nF bypass capacitors. Combined with 17.5µs transient immunity at 5% overdrive, this dual-layer filtering rejects fast EMI spikes without requiring additional RC networks or firmware debouncing.

Is the QFN-6 package thermally enhanced?

Yes. The 2mm × 2mm QFN-6 package includes an exposed thermal pad per JEDEC MO-229 VCCC. Thermal resistance θJA is 50°C/W on a 4-layer board, enabling continuous operation at full rating up to +85°C ambient without derating-critical for dense PCB layouts in portable devices.