Monolithic Power Systems Inc. MP6400DJ-01-LF-Z

Overview

MP6400DJ-01-LF-Z from Monolithic Power Systems is a low-quiescent-current (1.6µA typ), programmable-delay supervisory circuit in TSOT23-6 package, designed to monitor system supply voltages ≥0.4V and assert an open-drain RESET signal upon undervoltage or manual reset assertion. It supports adjustable threshold via external resistor divider, ±1% V_IT accuracy, and user-selectable delay from 2.1ms to 10s using CDELAY pin capacitance - deployed in battery-powered microcontroller systems requiring reliable power-on reset.

For engineers reviewing the MP6400DJ-01-LF-Z datasheet, MP6400DJ-01-LF-Z pinout, MP6400DJ-01-LF-Z application, or MP6400DJ-01-LF-Z equivalent, key selection criteria include its 0.4V minimum sense voltage capability, guaranteed RESET validity down to V_CC = 0.8V, immunity to ≤17.5µs SENSE transients, 24ms/380ms fixed delay options, and compatibility with 1.8–6V supply rails.

Technical Context

The MP6400DJ-01-LF-Z implements a precision voltage comparator with hysteresis (1.5–3.5% of V_IT) on the SENSE input and an internal 90kΩ pull-up on MR, enabling dual-trigger reset assertion - either by monitored rail collapse or external logic control. Its reset delay is generated by a 140nA current source charging an external capacitor at CDELAY, with threshold detection at 1.13V.

It operates across –40°C to +85°C ambient, guarantees functional reset behavior down to V_CC = 0.8V, and features open-drain RESET output rated for 5mA sink current and 6V absolute max voltage - allowing level-shifting above V_CC when pulled up to higher rails.

Key Specifications

Pinout & Package

MP6400DJ-01-LF-Z is housed in a 6-pin TSOT23 package (2.9mm × 1.6mm × 1.0mm height), RoHS-compliant and lead-free, with exposed pad not connected internally. Pin 1 is bottom-left when viewing top marking "4B" left-to-right.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar supervisory circuit applications.

Compared with TPS3808G01DBVR and MAX6326UT29D3+, MP6400DJ-01-LF-Z uniquely combines adjustable threshold (≥0.4V), manual reset input, open-drain output, and three-mode delay programming - making it optimal for compact, multi-rail, battery-sensitive systems requiring design flexibility.

Availability

MP6400DJ-01-LF-Z is available at Aetrix Electronics and suitable for battery-powered microcontrollers, FPGA configuration sequencing, laptop subsystem power management, and portable audio DSP boot control requiring stable component supply and long-term lifecycle support.

Supply support for MP6400DJ-01-LF-Z includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and power ICs, with design centers in the US, China, and Taiwan, and global manufacturing partnerships.

The MP6400 product line delivers ultra-low-power, precision supervisory circuits for power-sensitive embedded systems - targeting applications where extended battery life, accurate voltage monitoring, and flexible reset timing are critical.

FAQ

What is the minimum supply voltage at which MP6400DJ-01-LF-Z guarantees RESET assertion?

The device guarantees RESET remains asserted down to V_CC = 0.8V, ensuring reliable hold-down during brown-out conditions or slow power ramp-up. Below 0.8V, RESET behavior is undefined, but this is typically irrelevant since most target MCUs cease operation well above this threshold.

Can MP6400DJ-01-LF-Z monitor a 0.6V supply rail?

Yes - the MP6400DJ-01-LF-Z supports adjustable thresholds down to 0.4V using an external resistor divider on the SENSE pin. For a 0.6V rail, a two-resistor network (e.g., 100kΩ top, 100kΩ bottom) sets V_IT ≈ 0.3V at the divider tap, enabling precise 0.6V monitoring with ±1% accuracy.

How does the CDELAY pin select between 24ms and 380ms fixed delays?

A floating CDELAY pin selects 24ms delay; connecting CDELAY to VCC via a 50–200kΩ resistor selects 380ms. No capacitor is required for these modes. The internal 140nA current source charges CDELAY to 1.13V - the timing differs based on whether the pin is left open (high-impedance) or pulled to VCC (low-impedance path).

Is an external pull-up resistor required on the RESET pin?

Yes - the RESET pin is open-drain and requires an external pull-up resistor ≥10kΩ to a valid logic-high voltage (up to 6V). This resistor establishes the inactive (high) state and defines the logic level seen by the downstream device, such as a microcontroller's reset input.

What is the maximum allowable voltage on the SENSE pin?

The SENSE pin has an absolute maximum rating of 6V. However, for reliable operation, the monitored voltage should remain within the functional range defined by the resistor divider - typically scaled to match the desired V_IT (≥0.4V). Exceeding 6V risks permanent damage per Absolute Maximum Ratings.

Does MP6400DJ-01-LF-Z provide hysteresis on the SENSE input?

Yes - it provides 1.5% to 3.5% hysteresis on the V_IT threshold to prevent oscillation during slow-rising/falling supply transitions. This built-in hysteresis eliminates the need for external Schmitt-trigger components and improves noise immunity without additional BOM cost.

Can the MR pin be left unconnected in a design?

Yes - the MR pin has an internal 90kΩ pull-up to VCC, so it defaults to logic high when floating. This allows the device to operate solely on SENSE monitoring unless external logic is intentionally applied to force reset assertion, simplifying designs that do not require manual reset functionality.