Monolithic Power Systems Inc. MP6400DJ-25-LF-P

Overview

MP6400DJ-25-LF-P from Monolithic Power Systems is a low-quiescent-current (1.6 µA typ), programmable-delay supervisory circuit in TSOT23-6 package, with factory-set 2.5 V threshold voltage (±1% accuracy), 380 ms fixed delay (CDELAY tied to VCC), and open-drain RESET output. It monitors system supply rails in battery-powered microcontroller systems where reliable power-on reset and noise-immune voltage supervision are required.

For engineers reviewing the MP6400DJ-25-LF-P datasheet, MP6400DJ-25-LF-P pinout, MP6400DJ-25-LF-P application, or MP6400DJ-25-LF-P equivalent, key selection criteria include guaranteed RESET validity down to VCC = 0.8 V, immunity to ≤17.5 µs SENSE transients, manual reset (MR) input with internal 90 kΩ pull-up, and compatibility with 1.8–6 V supply range.

Technical Context

The MP6400DJ-25-LF-P implements a precision voltage comparator with hysteresis (1.5–3.5% of VIT) and a programmable delay timer driven by a 140 nA internal current source charging an external capacitor on CDELAY. Its RESET assertion is triggered independently by either SENSE falling below 2.33 V (VIT −1% tolerance) or MR pulled below 0.25×VCC.

RESET de-assertion occurs only after both SENSE exceeds 2.33 V + VHYS and MR rises above 0.7×VCC, followed by the selected delay interval. The open-drain output supports rail-to-rail pull-up (up to 6 V), and the device remains functional with VCC as low as 0.8 V - critical for brown-out detection during power ramp-down.

Key Specifications

Pinout & Package

MP6400DJ-25-LF-P uses the TSOT23-6 package (2.9 mm × 1.6 mm × 1.0 mm), with exposed pad not electrically connected. Pin 1 is bottom-left when reading top marking "4V" left-to-right.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar supervisory circuit applications.

Compared with MAX6326UT25+T and TPS3808G33DBVR, MP6400DJ-25-LF-P uniquely combines MR input, capacitor-programmable delay (2.1 ms–10 s), and documented 17.5 µs SENSE transient immunity - making it optimal for systems requiring coordinated reset control, flexible timing, and noise resilience.

Availability

MP6400DJ-25-LF-P is available at Aetrix Electronics and suitable for microcontroller power sequencing, battery-powered sensor nodes, laptop platform voltage monitoring, and FPGA configuration integrity applications requiring stable component supply and RoHS-compliant packaging.

Supply support for MP6400DJ-25-LF-P includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and power ICs, with design centers in the US, China, and Taiwan, and global manufacturing partnerships.

The MP6400 family targets ultra-low-power system supervision in portable, battery-operated, and energy-sensitive embedded platforms - emphasizing precision thresholding, minimal I_CC, and robust noise immunity without sacrificing configurability.

FAQ

What is the exact reset threshold voltage for MP6400DJ-25-LF-P?

The MP6400DJ-25-LF-P has a factory-set nominal threshold of 2.5 V, with a typical accuracy of ±1%, resulting in a confirmed VIT range of 2.33 V to 2.47 V at +25°C. This value is trimmed during production and verified per Monolithic Power Systems' Rev. 1.1 datasheet, Table "STANDARD VERSIONS".

Can MP6400DJ-25-LF-P monitor voltages other than 2.5 V?

No - MP6400DJ-25-LF-P is a fixed-threshold variant configured specifically for 2.5 V rails. For user-adjustable thresholds (≥0.4 V), the MP6400DJ-01 variant must be used with an external resistor divider on the SENSE pin, as specified in the "STANDARD VERSIONS" table and Figure 4 of the datasheet.

How is the 380 ms reset delay implemented on this part?

The 380 ms delay is activated by connecting the CDELAY pin directly to VCC through a resistor between 50 kΩ and 200 kΩ, as defined in the "PIN FUNCTIONS" section and "APPLICATION INFORMATION" subsection "Programmable Reset Delay Time". Floating CDELAY yields 24 ms; capacitor-to-GND yields 2.1 ms–10 s.

Does MP6400DJ-25-LF-P require an external pull-up on the RESET pin?

Yes - the RESET output is open-drain and must be pulled up externally with a resistor ≥10 kΩ to a valid logic-high voltage (up to 6 V). The datasheet specifies this in the "PIN FUNCTIONS" description for Pin 1 and the "APPLICATION INFORMATION" section "Reset Output Function".

Is the MR pin internally pulled up, and what is its resistance value?

Yes - the MR pin features an internal pull-up resistor to VCC with a nominal value of 90 kΩ, as confirmed in the "ELECTRICAL CHARACTERISTICS" table (MR R = 50–110 kΩ) and "PIN FUNCTIONS" description. This eliminates the need for an external pull-up in basic manual reset configurations.

What is the minimum VCC required for RESET to remain valid?

The MP6400DJ-25-LF-P guarantees RESET functionality down to VCC = 0.8 V, as stated in the "FEATURES" list ("Guaranteed Reset Valid to VCC=0.8V") and "ABSOLUTE MAXIMUM RATINGS" footnote (5). Below this, RESET behavior is undefined per datasheet Section "APPLICATION INFORMATION".