Monolithic Power Systems Inc. MP6401DGT-18AD3-LF-P

Overview

MP6401DGT-18AD3-LF-P from Monolithic Power Systems is a 300mA low-dropout linear regulator with integrated push-pull active-low reset circuit, fixed 1.8V output (±2% accuracy), -7.5% reset threshold, and 200ms reset delay. It operates from 2.5V–5.5V input, delivers 114mV dropout at full load, and features 15μVRMS output noise and 57dB PSRR at 1kHz. Used in smartphone baseband power rails requiring precise voltage regulation and reliable microprocessor reset signaling.

For engineers reviewing the MP6401DGT-18AD3-LF-P datasheet, MP6401DGT-18AD3-LF-P pinout, MP6401DGT-18AD3-LF-P application, or MP6401DGT-18AD3-LF-P equivalent, this page provides verified package mapping (TQFN6), terminal roles, thermal and reverse-leakage protection behavior, reset timing fidelity, and design-meaningful LDO performance metrics for portable system power integrity validation.

Technical Context

The MP6401 integrates an error-amplifier-based LDO core with independent reset comparator logic monitoring regulated output voltage against two factory-set thresholds (-7.5% or -12.5%). Its EN pin enables high-side logic-controlled startup, while ADJ pin selects between fixed-output mode (GND tie) or adjustable mode (external resistor divider).

Reset assertion occurs within 30μs of VOUT crossing the threshold; deassertion follows a fixed, factory-programmed delay (200ms for D3 suffix). The device implements reverse-current blocking, thermal shutdown at 150°C (20°C hysteresis), and current limiting (500mA guaranteed), all operating independently of enable state.

Key Specifications

Pinout & Package

MP6401DGT-18AD3-LF-P uses a 2mm×2mm TQFN6 package with exposed thermal pad (pin 3 = GND), optimized for space-constrained portable PCB layouts and efficient heat dissipation via PCB copper area.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar LDO-with-reset applications.

Compared with TPS79918YZTT and MCP1826-1802E/DB, MP6401DGT-18AD3-LF-P uniquely integrates precision reset timing and LDO regulation in one 2mm×2mm package-reducing total solution size by ≥35% and eliminating timing mismatch risks between discrete regulator and supervisor.

Availability

MP6401DGT-18AD3-LF-P is available at Aetrix Electronics and suitable for smartphone baseband power, portable GPS receivers, and wireless headset audio codecs requiring stable component supply, consistent parametric performance across production lots, and long-term lifecycle support.

Supply support for MP6401DGT-18AD3-LF-P includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and mixed-signal ICs for power management, motor drive, and automotive applications.

The MP6401 belongs to MPS's integrated power-supervision LDO product line, designed specifically to replace multi-component power-rail solutions in space- and noise-constrained portable electronics.

FAQ

What is the exact reset threshold voltage for MP6401DGT-18AD3-LF-P?

The "A" suffix indicates a -7.5% reset threshold relative to nominal output voltage. For the 1.8V variant, this equals 1.665V (1.8V × 0.925). The device asserts RESET when VOUT falls below this level and deasserts after the 200ms delay once VOUT rises above it.

Can the ADJ pin be left floating in fixed-output mode?

No. In fixed-output mode, the ADJ pin must be connected to GND with impedance <50kΩ-typically via direct short-to ensure correct internal reference selection. Floating ADJ causes undefined output voltage and potential regulation failure.

Does MP6401DGT-18AD3-LF-P support backup battery operation?

Yes. Its reverse-current protection blocks OUT→IN leakage to <1μA when VIN drops below VOUT, enabling seamless switchover to a backup battery connected at the OUT pin-commonly used to retain SRAM content during main power loss.

What is the minimum output capacitance required for stability?

The datasheet specifies a minimum 3.3μF ceramic capacitor (X5R or X7R dielectric) at the OUT pin. Using ≤2.2μF risks instability and excessive output ripple; 10μF is recommended for improved transient response and PSRR.

How does thermal shutdown behave during sustained overload?

When junction temperature reaches 150°C, the pass element shuts off completely. It remains off until temperature drops to ~130°C (20°C hysteresis), then resumes regulation. This cycle prevents permanent damage but may cause intermittent output if thermal design is inadequate.

Is the RESET output truly push-pull, and what are its drive capabilities?

Yes. RESET is a true push-pull output: it actively pulls low (≤0.4V at 3.2mA sink) and actively pulls high (≥0.8×VOUT at 500μA source). No external pull-up resistor is needed-direct connection to microprocessor /RESET pins is supported.

What is the maximum allowable input voltage for continuous operation?

The absolute maximum rating is 6V, but the recommended operating range is 2.5V–5.5V. Sustained operation above 5.5V risks exceeding junction temperature limits and violating SOA, even with adequate heatsinking.