Monolithic Power Systems Inc. MP6401DGT-25AD3-LF-P

Overview

MP6401DGT-25AD3-LF-P from Monolithic Power Systems is a 300mA low-dropout linear regulator with integrated push-pull active-low reset circuit, delivering ±2% output voltage accuracy at 2.5V over 2.5V–5.5V input range. It features 114mV dropout at full load, 80μA quiescent current, and selectable 200ms reset delay for microprocessor supervision in space-constrained portable electronics.

For engineers reviewing the MP6401DGT-25AD3-LF-P datasheet, MP6401DGT-25AD3-LF-P pinout, MP6401DGT-25AD3-LF-P application, or MP6401DGT-25AD3-LF-P equivalent, key selection criteria include fixed 2.5V output, -7.5% reset threshold, TQFN6 (2mm×2mm) package, thermal/short-circuit protection, and ultra-low 15μVRMS output noise.

Technical Context

The device integrates an LDO regulator and independent reset monitor in a single die: the regulation loop uses an internal 1.229V reference and error amplifier to maintain output stability, while the reset comparator continuously samples VOUT against a precision -7.5% threshold relative to nominal 2.5V. Both functions share common thermal shutdown (150°C) and reverse-current protection circuitry.

Reset assertion is triggered by VOUT drop below 2.3125V (2.5V × 92.5%), followed by a fixed 200ms delay before deassertion upon recovery; EN pin enables/disables regulation independently, with logic-compatible thresholds (VIH = 0.7VIN, VIL = 0.3VIN) and sub-1μA shutdown current.

Key Specifications

Pinout & Package

TQFN6 (2mm × 2mm) package with exposed thermal pad; 0.5mm pitch, 6-pin layout optimized for high-density PCBs in portable applications.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar LDO-with-reset applications.

Compared with TPS79925DBVR and MAX8869EUT+T, MP6401DGT-25AD3-LF-P uniquely delivers 300mA capacity, 200ms reset delay, and 114mV dropout in a single 2mm×2mm package-enabling smaller footprint, longer battery life, and more robust brownout immunity than either alternative.

Availability

MP6401DGT-25AD3-LF-P is available at Aetrix Electronics and suitable for smartphone baseband power, portable GPS receivers, wireless headset audio codecs, and PDA system management requiring stable component supply across production volumes.

Supply support for MP6401DGT-25AD3-LF-P includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and power ICs, with design centers in the US, China, and Taiwan.

This device belongs to MPS's integrated power management portfolio, engineered specifically for space- and power-constrained portable electronics where combining regulation and reset supervision improves reliability and reduces bill-of-materials cost.

FAQ

What is the exact reset threshold voltage for MP6401DGT-25AD3-LF-P?

The reset threshold is -7.5% of the nominal 2.5V output, equating to 2.3125V. This value is factory-trimmed and guaranteed over temperature (-40°C to +85°C) with ±2.5% tolerance, ensuring consistent microprocessor reset behavior across operating conditions.

Can the ADJ pin be left floating in this fixed-output variant?

No. The ADJ pin must be connected to GND to select the fixed 2.5V output mode. Floating ADJ violates the absolute maximum rating (ADJ voltage must stay within –0.3V to 6V) and risks unpredictable regulation or reset behavior due to internal node instability.

Does the 200ms reset delay start immediately when VOUT crosses the threshold?

Yes. The delay timer begins precisely when VOUT falls below 2.3125V. RESET remains asserted for the full 200ms even if VOUT recovers earlier; it deasserts only after the complete delay period elapses with VOUT above threshold.

What is the minimum output capacitance required for stability?

A minimum 3.3μF X5R or X7R ceramic capacitor is required at the OUT pin. Lower values risk oscillation; larger values (e.g., 10μF) improve transient response and PSRR but do not affect basic loop stability per the datasheet design guidelines.

How does reverse current protection operate during battery backup scenarios?

When VIN drops below VOUT while EN remains high, the internal MOSFET gate is disabled, reducing OUT-to-IN leakage to <0.1μA. This preserves backup battery charge during main power loss, enabling RAM retention for up to 72 hours with a typical 10μF supercapacitor.

Is the RESET output truly push-pull, or does it require an external pull-up?

It is a true push-pull driver: actively pulls low (≤0.4V at 3.2mA sink) and actively drives high (≥0.8×VOUT at 500μA source). No external pull-up resistor is needed, simplifying layout and eliminating standby current through external components.

What thermal derating applies when using the TQFN6 package at 85°C ambient?

With θJA = 80°C/W, maximum continuous power dissipation at TA = 85°C is 0.81W. At 300mA load and 5.5V input (2.5V output), power dissipation is (5.5–2.5)V × 0.3A = 0.9W - exceeding the limit. Derate input voltage or reduce load current to maintain TJ ≤ 125°C.