Monolithic Power Systems Inc. MP6401DJ-33AD3-LF-Z

Overview

MP6401DJ-33AD3-LF-Z from Monolithic Power Systems is a 300mA fixed-output (3.3V) LDO linear regulator with integrated push-pull active-low reset circuit, ±2% output accuracy, 114mV dropout at full load, and selectable 200ms reset delay. It operates from 2.5V–5.5V input and supports -40°C to +85°C ambient, targeting power management in space-constrained portable electronics.

For engineers reviewing the MP6401DJ-33AD3-LF-Z datasheet, MP6401DJ-33AD3-LF-Z pinout, MP6401DJ-33AD3-LF-Z application, or MP6401DJ-33AD3-LF-Z equivalent, key selection criteria include reset threshold (-7.5% of VOUT), ultra-low 15µVRMS noise, PSRR of 57dB at 1kHz, thermal/short-circuit protection, and TSOT23-6 package compatibility with high-density PCB layouts.

Technical Context

The MP6401DJ-33AD3-LF-Z integrates a low-noise LDO regulator and independent reset monitor in a single TSOT23-6 die. Its ADJ pin configures fixed 3.3V output when grounded, while the internal reset comparator asserts RESET when VOUT falls below 92.5% of nominal (–7.5% threshold), with precise 200ms delay before deassertion after recovery.

It employs an internal PMOS pass device with reverse current protection, enabling backup battery operation without external diodes. The EN pin provides active-high enable control, and thermal shutdown engages at 150°C with 20°C hysteresis-critical for sustained operation in thermally constrained handheld devices.

Key Specifications

Pinout & Package

MP6401DJ-33AD3-LF-Z uses the TSOT23-6 package (1.0mm max height, 2.8mm × 2.9mm footprint), optimized for high-density portable PCBs. Exposed pad is not present; thermal dissipation relies on copper pour under pins 1 (IN), 2 (GND), and 6 (OUT).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar LDO-with-reset applications.

Compared with TPS79933DRVR and MCP1826-3302E/DB, MP6401DJ-33AD3-LF-Z delivers lower system-level component count, guaranteed 200ms reset delay accuracy, and push-pull RESET capable of directly driving modern µP reset inputs without external components-reducing layout complexity and qualification effort.

Availability

MP6401DJ-33AD3-LF-Z is available at Aetrix Electronics and suitable for smartphone baseband power, portable GPS receivers, wireless headset audio codecs, and PDA system management requiring stable component supply across high-volume production cycles.

Supply support for MP6401DJ-33AD3-LF-Z includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and power ICs, headquartered in Kirkland, Washington, with global design and support operations.

The MP6401 belongs to MPS's integrated power management portfolio, designed specifically for space- and power-constrained portable electronics where combining LDO regulation and reset supervision reduces bill-of-materials and improves system reliability.

FAQ

What is the exact reset threshold voltage for MP6401DJ-33AD3-LF-Z?

The reset threshold is –7.5% of the nominal 3.3V output, equating to 3.0525V. This value is factory-trimmed and specified over temperature (–40°C to +85°C) with ±2.5% tolerance, ensuring reliable microprocessor reset assertion during brownout conditions without false triggering.

Can the ADJ pin be left unconnected?

No. The ADJ pin must be connected to GND for fixed 3.3V operation. Leaving it floating causes undefined output behavior and potential regulator instability. If unused, it must be tied directly to GND with minimal trace length to avoid noise coupling.

Does MP6401DJ-33AD3-LF-Z support backup battery operation?

Yes. Its reverse current protection blocks OUT-to-IN leakage (<0.1µA) when VIN drops below VOUT, allowing a backup battery or supercapacitor connected to the OUT pin to sustain critical circuitry-such as SRAM or RTC-during main power loss.

What is the minimum output capacitor required for stability?

A minimum 3.3µF X7R or X5R ceramic capacitor is required on the OUT pin. Lower ESR values (<100mΩ) and larger capacitance (e.g., 10µF) improve transient response and PSRR performance, especially under dynamic load steps typical in digital subsystems.

How does the EN pin behave during power-up sequencing?

The EN pin must be held high (≥0.7×VIN) before or simultaneously with VIN application to ensure proper startup. Delaying EN assertion after VIN rise may cause output overshoot or latch-up. For automatic enable, tie EN directly to IN with a 100kΩ pull-up as a fail-safe.

Is thermal shutdown latched or auto-recovering?

Thermal shutdown is auto-recovering: the device disables the pass transistor at TJ ≥150°C and re-enables it once junction temperature falls to ~130°C (20°C hysteresis). This protects against permanent damage while allowing resumption of operation after cooling-no manual reset required.

What is the maximum allowable input voltage for continuous operation?

The absolute maximum input voltage is +6V, but continuous operation must remain within the recommended range of 2.5V–5.5V. Exceeding 5.5V risks parametric shift or long-term reliability degradation, even if within absolute ratings-designs should clamp or regulate VIN accordingly.