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Monolithic Power Systems Inc. MP6402DN-EF-LF-P

Part No.:
MP6402DN-EF-LF-P
Manufacturer:
Monolithic Power Systems Inc.
Category:
Voltage Regulators - Linear, Low Drop Out (LDO) Regulators
Package:
8-SOIC (0.154", 3.90mm Width) Exposed Pad
Datasheet:
AetrixMP6402DN-EF-LF-P.pdf
Description:
NRFND: USE MP6400 AS REPLACEMENT
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:1,988

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Product details

Overview

MP6402DN-EF-LF-P from Monolithic Power Systems is a dual-channel, high-PSRR linear regulator with integrated reset circuitry, delivering 500mA per channel at ±1.5% output voltage accuracy (0.9V–3.3V), 60dB PSRR at 100Hz, and programmable reset delay via external capacitor. It operates from 2.5V–5.5V input and supports consumer electronics requiring stable dual-rail power with system-level reset supervision.

For engineers reviewing the MP6402DN-EF-LF-P datasheet, MP6402DN-EF-LF-P pinout, MP6402DN-EF-LF-P application, or MP6402DN-EF-LF-P equivalent, key selection criteria include dual LDO channel independence, reset monitoring of OUT2 only, SOIC8E package thermal performance (θJA = 55°C/W), and EN-active-high enable logic with mandatory tie-to-IN if unused.

Technical Context

The MP6402 integrates two independent P-channel MOSFET-based LDOs with separate internal references and current-limit circuits, each rated for 500mA continuous output. Its reset function monitors only OUT2 voltage with ±3% threshold accuracy and active-low open-drain RESET output.

Reset delay is set by an external capacitor on ExtCap pin (e.g., 3300pF yields 1.4–2.8ms delay), while thermal shutdown engages at TJ = 150°C and releases at 130°C. Output discharge provides 100Ω path to GND when disabled, and both channels feature 15µVRMS noise (100Hz–80kHz).

Key Specifications

Parameter Value and Actual Design Meaning
Output Current 500mA per channel - supports dual-rail microcontroller core/I/O rails without derating at full load.
Output Voltage Accuracy ±1.5% at 10mA, ±2.3% over -40°C to +85°C - ensures reliable logic-level compliance across temperature.
PSRR 60dB at 100Hz (OUT1), 51dB at 100Hz (OUT2) - suppresses low-frequency supply ripple critical for RF/analog subsystems.
Dropout Voltage 260mV at 500mA - enables operation with minimal headroom (e.g., 2.76V IN for 2.5V OUT2).
Reset Threshold Accuracy ±3% of VOUT2 - guarantees precise brown-out detection timing for system initialization sequences.
Quiescent Current 0.58mA typical (EN active, no load) - minimizes standby power in battery-backed applications.
Noise 15µVRMS (100Hz–80kHz) - meets low-noise requirements for ADC reference or RF bias rails.

Pinout & Package

MP6402DN-EF-LF-P uses the SOIC8E package (exposed thermal pad), offering θJA = 55°C/W and θJC = 12°C/W on a 4-layer PCB. The exposed pad must be soldered to a large ground plane for thermal integrity and EMI reduction.

Pin/Terminal Circuit Role Design Meaning
1, 2 IN Power input (dual pins) Parallel input connection reduces trace resistance and improves current sharing; requires single 1µF+ ceramic input cap.
3 EN Enable control Active-high logic input; must be tied to IN if unused-floating EN causes undefined operation and potential latch-up.
4 GND Ground reference Common return for both LDOs and reset circuit; connects to exposed pad for thermal conduction and noise immunity.
5 ExtCap Reset delay timing node Connects to external capacitor (e.g., 3300pF) to set RESET assertion delay; stray capacitance directly impacts timing accuracy.
6 RESET Open-drain reset output Active-low signal; requires external pull-up resistor ≥10kΩ to system VCC for proper logic level and drive strength.
7 OUT2 Channel 2 regulated output Primary reset-monitored rail; voltage must exceed OUT1 (e.g., 2.5V/1.8V); powers critical subsystems like RF transceivers.
8 OUT1 Channel 1 regulated output Secondary rail; not monitored by reset circuit; used for non-critical domains such as digital I/O or peripherals.

Key Features

Feature Design Value
Dual independent LDOs Each channel has dedicated pass element, reference, and current limit-enables asymmetric rail sequencing and fault isolation.
Programmable reset delay Delay time scales linearly with external capacitor value (e.g., 1nF → ~0.7ms, 10nF → ~6.1ms), enabling precise system boot timing alignment.
Output discharge 100Ω internal discharge path activates only when EN = low-prevents floating outputs during power-down without external components.
Thermal shutdown with hysteresis Shuts down at 150°C, resumes at 130°C-prevents thermal cycling damage and supports intermittent high-load operation in compact enclosures.
High PSRR + low noise 60dB PSRR at 100Hz and 15µVRMS noise-eliminates need for additional filtering stages in sensitive analog/RF power domains.

Applications

Portable GPS Devices Wireless Devices

Use Scenario: Dual-rail power for GPS baseband processor (1.8V core) and RF front-end (2.5V LNA/VCO).

IC Role / Device Role / Timing Role: MP6402DN-EF-LF-P supplies both rails while using OUT2 (2.5V) to trigger RESET during RF supply brown-out, ensuring clean re-initialization.

Use Value: Eliminates discrete reset IC and saves PCB area; 60dB PSRR prevents GPS position drift caused by switching noise coupling into RF supply.

Use Scenario: Powering Bluetooth SoC with 1.2V digital core and 3.3V radio interface in hearing aids.

IC Role / Device Role / Timing Role: OUT1 delivers 1.2V to core logic; OUT2 delivers 3.3V to radio, with RESET asserting if radio supply drops below 92.5% threshold.

Use Value: Programmable reset delay (via 3300pF cap) synchronizes with SoC's internal reset timeout, avoiding spurious resets during transient load surges.

Consumer Electronics Blu-ray Players

Use Scenario: Dual-voltage supply for HDMI transmitter IC requiring 1.8V I/O and 3.3V analog PHY.

IC Role / Device Role / Timing Role: OUT2 (3.3V) powers analog PHY and triggers RESET on undervoltage; OUT1 (1.8V) powers digital interface independently.

Use Value: Independent current limiting per channel prevents HDMI hot-plug events from disrupting analog PHY regulation or causing false resets.

Use Scenario: Powering servo motor driver IC and laser diode controller in optical pickup unit.

IC Role / Device Role / Timing Role: OUT2 (2.5V) supplies laser bias; RESET asserts if bias drops, halting disc spin and preventing data corruption.

Use Value: 15µVRMS noise ensures stable laser diode current control; thermal shutdown protects against enclosure overheating during extended playback.

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-LDO-with-reset applications.

Alternative Part Technical Difference Application Difference Selection Advice
TPS7A1633DGNR Single-channel 3.3V LDO with reset; no dual-output capability; higher quiescent current (1.2µA off, 25µA on). Lacks second regulated rail; requires external LDO for multi-rail systems. Select only if single-rail reset supervision suffices and board space permits adding a second regulator.
MAX1725EEE+ Dual 300mA LDOs with reset; fixed 3.3V/2.5V outputs; no programmable reset delay; lower PSRR (45dB @100Hz). Fixed output voltages limit flexibility; shorter default reset delay (200µs) unsuitable for slow-ramping rails. Choose only for cost-sensitive designs where output voltage flexibility and precise delay timing are not required.

Compared with TPS7A1633DGNR and MAX1725EEE+, MP6402DN-EF-LF-P uniquely delivers dual 500mA rails, ±1.5% accuracy across temperature, and user-adjustable reset timing-making it optimal for space-constrained, multi-rail embedded systems demanding coordinated power sequencing and robust brown-out recovery.

Availability

MP6402DN-EF-LF-P is available at Aetrix Electronics and suitable for portable GPS devices, wireless audio endpoints, and Blu-ray optical modules requiring stable component supply with guaranteed long-term manufacturability and RoHS-compliant packaging.

Supply support for MP6402DN-EF-LF-P includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and power ICs, with design centers in the US, China, and Taiwan.

The MP6402 belongs to MPS's dual-LDO-with-integrated-supervisory-function product line, engineered for compact, low-noise power delivery in battery-powered and thermally constrained consumer electronics.

FAQ

What is the maximum allowable input voltage for MP6402DN-EF-LF-P?

The absolute maximum input voltage is 6V, but recommended operating range is 2.5V to 5.5V. Exceeding 6V risks permanent damage to internal P-channel pass transistors and reference circuitry, as specified in Absolute Maximum Ratings Table on page 3 of the datasheet.

Can OUT1 and OUT2 be configured to the same voltage?

Yes-ordering code D (1.3V/1.3V), E (1.8V/1.8V), F (2.5V/2.5V), and G (2.8V/2.8V) support matched dual outputs. However, the reset circuit monitors only OUT2, so identical voltages still require OUT2 to be designated as the supervised rail.

Is the RESET pin compatible with 1.8V logic systems?

Yes-RESET is open-drain with VOL ≤ 0.2V at 2mA sink current, allowing direct interface to 1.8V, 2.5V, or 3.3V logic families when paired with an appropriate pull-up resistor to the target VCC domain.

How does the output discharge function operate?

When EN is pulled low, a 100Ω internal switch connects each OUT pin to GND for rapid capacitor discharge. This occurs only during disable-no discharge path exists during normal operation, preserving output stability.

What is the minimum external capacitor value for reliable reset delay programming?

The datasheet specifies 3300pF as typical, but functional operation begins at ~100pF (yielding ~0.1ms delay). Below 100pF, stray capacitance dominates, causing timing inaccuracy; ceramic capacitors with low leakage are mandatory.

Does MP6402DN-EF-LF-P support reverse current blocking?

No-the device lacks reverse-current protection diodes or MOSFET control. If OUT voltage exceeds IN (e.g., during hot-swap or backup battery scenarios), current can flow backward through the pass elements, potentially damaging upstream sources.

Why must the EN pin never be left floating?

A floating EN pin creates undefined logic state due to internal leakage paths, leading to erratic enable/disable behavior, increased quiescent current, or unintended thermal shutdown. The datasheet explicitly mandates tying EN to IN if unused.

MP6402DN-EF-LF-P Specifications

Product attributes
Attribute value
Manufacturer:
Monolithic Power Systems Inc.
Series:
MP
Package/Case:
8-SOIC (0.154", 3.90mm Width) Exposed Pad
Packaging:
Tape & Reel (TR)
Product Status:
Not For New Designs
Output Configuration:
Positive
Output Type:
Fixed
Number of Regulators:
2
Voltage - Input (Max):
5.5V
Voltage - Output (Min/Fixed):
1.8V, 2.5V
Voltage - Output (Max):
-
Voltage Dropout (Max):
0.26V @ 500mA
Current - Output:
500mA
Current - Quiescent (Iq):
580 µA
Current - Supply (Max):
-
PSRR:
60dB ~ 51dB (100Hz)
Control Features:
Current Limit, Enable, Reset
Protection Features:
Over Current, Over Temperature, Short Circuit
Operating Temperature:
-40°C ~ 125°C (TJ)
Grade:
-
Qualification:
-
Mounting Type:
Surface Mount
Supplier Device Package:
8-SOICE

MP6402DN-EF-LF-P FAQ

1.How can I place an order for MP6402DN-EF-LF-P through Aetrix?

Please submit a Request for Quotation (RFQ) for MP6402DN-EF-LF-P on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for MP6402DN-EF-LF-P reliable?

The price and inventory of MP6402DN-EF-LF-P are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MP6402DN-EF-LF-P is usually 5 days.

3.What payment methods are accepted for MP6402DN-EF-LF-P?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MP6402DN-EF-LF-P transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for MP6402DN-EF-LF-P?

MP6402DN-EF-LF-P orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your MP6402DN-EF-LF-P order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for MP6402DN-EF-LF-P?

For technical support, including MP6402DN-EF-LF-P datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MP6402DN-EF-LF-P requirements.

6.How does Aetrix verify that MP6402DN-EF-LF-P is sourced from the original manufacturer or authorized distributors?

All MP6402DN-EF-LF-P products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MP6402DN-EF-LF-P meets industry standards.

7.What is the process for return or replacement of MP6402DN-EF-LF-P?

All MP6402DN-EF-LF-P units undergo pre-shipment inspection (PSI). If there is an issue with MP6402DN-EF-LF-P, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The MP6402DN-EF-LF-P part is unused and in its original packaging.

Return procedure for MP6402DN-EF-LF-P:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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