Monolithic Power Systems Inc. MP6402DQT-EF-LF-Z

Overview

MP6402DQT-EF-LF-Z from Monolithic Power Systems is a dual-channel, high-PSRR (60dB @ 100Hz) linear regulator with integrated reset circuit, delivering up to 500mA per channel at ±1.5% output voltage accuracy and 15µVRMS low-noise performance. It operates from 2.5V–5.5V input, supports fixed output voltages from 0.9V to 3.3V (e.g., 1.8V/2.5V), and features programmable reset delay via external capacitor on ExtCap pin. Used in portable GPS and wireless devices for stable dual-rail power with system-level reset supervision.

For engineers reviewing the MP6402DQT-EF-LF-Z datasheet, MP6402DQT-EF-LF-Z pinout, MP6402DQT-EF-LF-Z application, or MP6402DQT-EF-LF-Z equivalent, key selection criteria include dual LDO channel independence, reset threshold accuracy (±3%), thermal shutdown behavior at 150°C, and TQFN8 (3×3mm) package compatibility with high-density PCB layouts.

Technical Context

The MP6402 integrates two independent P-channel MOSFET-based LDOs with separate output pins (OUT1, OUT2) and shared input (IN/IN), enabling asymmetric rail generation where OUT2 voltage must exceed OUT1. Its internal reset circuit monitors only OUT2 voltage and asserts open-drain RESET low when VOUT2 falls below 92.5% of nominal, with hysteresis of 2%.

Reset delay is set by external capacitor (e.g., 3300pF → 1.4–2.8ms), while EN enables/disables both regulators simultaneously. Thermal shutdown engages at TJ = 150°C (typ.) and recovers at 130°C (typ.), and short-circuit protection limits peak current to 200mA during fault conditions.

Key Specifications

Pinout & Package

TQFN8 (3mm × 3mm) package with exposed thermal pad (FIN) connected to GND for enhanced heat dissipation; RoHS-compliant, lead-free, and halogen-free construction.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-LDO-with-reset applications.

Compared with XC6223D182MR-G and RT9013-18PB, the MP6402DQT-EF-LF-Z uniquely delivers simultaneous 500mA dual-rail regulation, programmable reset delay, and 60dB PSRR-enabling single-package replacement of two discrete LDOs plus a reset supervisor in portable RF systems.

Availability

MP6402DQT-EF-LF-Z is available at Aetrix Electronics and suitable for portable GPS receivers, wireless communication modules, and Blu-ray player logic boards requiring stable component supply with guaranteed long-term manufacturability.

Supply support for MP6402DQT-EF-LF-Z includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and power ICs, headquartered in California and serving global industrial, computing, and consumer markets.

The MP6402 belongs to MPS's dual-LDO-with-integrated-supervisory-function product line, designed specifically for space-constrained portable electronics needing coordinated power sequencing, low noise, and robust fault detection without external components.

FAQ

What is the minimum input voltage required for MP6402DQT-EF-LF-Z to regulate 2.5V on OUT2?

The minimum input voltage is determined by dropout: 2.5V + 260mV = 2.76V. The device specifies operation down to 2.5V input, but at 2.5V input and 2.5V output, regulation is not guaranteed due to insufficient headroom. For reliable 2.5V output, VIN ≥ 2.76V is required under 500mA load.

Can OUT1 and OUT2 be configured to the same voltage, such as 1.8V/1.8V?

Yes - Table 1 lists code "E" as VOUT1 = 1.8V and VOUT2 = 1.8V. However, the datasheet states "OUT2 pin voltage is recommended to be higher than OUT1 pin voltage," implying same-voltage operation is supported but may reduce margin for reset assertion reliability if both rails sag simultaneously.

Is the RESET pin actively driven or open-drain?

RESET is an open-drain output requiring an external pull-up resistor (R1 > 10kΩ to VCC). It pulls low during VOUT2 undervoltage or thermal shutdown and floats high otherwise - enabling wired-OR reset bus configurations with multiple supervisors.

How does the EN pin behave during power-up?

EN is active-high with VIH = 1.5V minimum. During power ramp, the part remains disabled until EN exceeds 1.5V. If tied to IN, enable tracks input rise time; if driven by a slow GPIO, ensure EN reaches 1.5V before IN stabilizes to avoid brown-out reset glitches.

What is the maximum allowable value for the ExtCap capacitor?

No absolute maximum is specified, but delay scales linearly: TD ≈ 0.1 + 6.0 × C4 (with C4 in nF, TD in ms). At C4 = 10nF, TD ≈ 61ms. Larger values increase delay but also susceptibility to stray capacitance error and board-area cost; 1–10nF is typical for most applications.

Does MP6402DQT-EF-LF-Z support reverse current blocking?

No - the device uses P-channel MOSFET pass elements, which inherently allow reverse current flow from OUT to IN if VOUT > VIN. External reverse-blocking diodes or ideal diode controllers are required in battery-backup or OR-ing configurations.

What thermal derating applies to the TQFN8 package at 85°C ambient?

θJA = 48°C/W. At TA = 85°C and TJ(MAX) = 125°C (recommended max), max power dissipation = (125 − 85)/48 = 0.83W. With VIN = 3.3V and VOUT2 = 2.5V, max sustainable IOUT2 = 0.83W / (3.3 − 2.5) = 1.04A - well above 500mA rating, confirming full load capability at 85°C ambient.