Monolithic Power Systems Inc. MP6412GQGU-P
- Part No.:
- MP6412GQGU-P
- Manufacturer:
- Monolithic Power Systems Inc.
- Package:
- 10-UFQFN
- Datasheet:
-
MP6412GQGU-P.pdf
- Description:
- ULTRA LOW IQ LOAD SWITCH CONTROL
- Quantity:
- Payment:

- Shipping:

Inventory:3,259
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Product details
Overview
MP6412GQGU-P from Monolithic Power Systems is an ultra-low quiescent current load-switch controller that drives external P-channel MOSFETs to manage main power sequencing in portable electronics. It operates from 2.2V to 12V, delivers <2µA on-state current and <1µA shipping mode current, features factory-programmable reset timing, and integrates dual discharge paths (DCHG0/DCHG1) and charger-insert detection (TAIN) for smartphone power management.
For engineers reviewing the MP6412GQGU-P datasheet, MP6412GQGU-P pinout, MP6412GQGU-P application, or MP6412GQGU-P equivalent, key selection criteria include its 10-pin UTQFN package, dual active-low RST0/RST1 reset inputs with 10s debounce, SRO/nSRO complementary reset outputs, and priority-based signal arbitration (RESET > OFF > TAIN) in multi-event scenarios.
Technical Context
The MP6412 implements a deterministic state-machine controller with hardwired priority logic: RESET (RST0+RST1 low ≥10s) forces immediate load switch turn-off and 400ms system discharge, overriding all other inputs. Its gate driver delivers push-pull SRO output with 1–3ms rise/fall times and open-drain nSRO for status monitoring.
Power sequencing is governed by factory-fixed timing parameters: T1=10s (reset entry), T2'=400ms (reset off time + 2×discharge delay), T5=15s (shipping mode entry), and T7=50ms (TAIN confirm delay). UVLO threshold is fixed at 1.43V with 500mV hysteresis, and TAIN input uses internal 2MΩ pull-down with 3.3V rising threshold for charger detection.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VIN Range | 2.2V to 12V - supports single-cell Li-ion up to 3S battery input without external regulation |
| Quiescent Current | <2µA - enables >1-year battery shelf life in always-on portable devices |
| Shipping Mode Current | <1µA - reduces parasitic drain during logistics and storage |
| Reset Delay (T1) | 10s typical - prevents accidental reset from transient button presses |
| Discharge Resistance | 150Ω typical - provides controlled VOUT ramp-down during RESET without excessive IC heating |
| TAIN Threshold | 3.15V rising - ensures reliable charger detection across temperature with 100mV hysteresis |
| ESD Rating | HBM 2kV - protects against handling ESD in handheld assembly environments |
Pinout & Package
MP6412GQGU-P is housed in a 1.4mm × 1.8mm UTQFN-10 package with wettable flanks, optimized for space-constrained mobile PCBs and compatible with automated optical inspection (AOI).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 DCHG1 | Discharge path 1 | Activates 150Ω discharge to VOUT when RESET enters T2 phase and TAIN is low |
| 2 TAIN | Charger insert detection input | Internal 2MΩ pull-down; detects ≥3.15V from external charger via 100kΩ resistor divider |
| 3 VIN | Main power input | Supplies internal circuitry and gate driver; supports 2.2–12V with 14V absolute max |
| 4 RST0 | Active-low reset input 0 | Debounced 10ms; must be held low with RST1 for 10s to trigger full RESET sequence |
| 5 RST1 | Active-low reset input 1 | Same debounce and timing as RST0; both required simultaneously for RESET activation |
| 6 OFF | Shipping mode enable | 5-cycle pulse (≥250µs on/off) triggers 15s delay before entering ultra-low-IQ shutdown |
| 7 GND | Ground reference | Primary return path for VIN, SRO, and internal logic; requires low-impedance PCB plane |
| 8 SRO | Push-pull system reset output | Drives external P-FET gate directly; 1–3ms edge rates, logic-high = load ON |
| 9 nSRO | Open-drain reset status output | Complements SRO; floats in shipping mode; sinks 1mA at 0.4V low level |
| 10 DCHG0 | Discharge path 0 | Identical function to DCHG1; enables parallel discharge for faster system energy clearance |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent discharge paths | DCHG0/DCHG1 each provide 150Ω discharge to clear VOUT during RESET, reducing system recovery time by >30% vs. single-path controllers |
| Priority-based signal arbitration | Hardware-enforced hierarchy (RESET > OFF > TAIN) eliminates firmware dependency for conflict resolution in power-critical events |
| Factory-programmed timing | Fixed T1=10s, T2'=400ms, T5=15s eliminate external timing components and reduce BOM count |
| Charger-aware discharge disable | TAIN high automatically disables DCHG0/DCHG1 to prevent thermal stress when external charger is connected |
| Ultra-low shipping mode current | 0.75–1.5µA ensures ≤0.1% annual battery capacity loss during 12-month logistics cycle |
Applications
| Smartphone Power Sequencing | Tablet Battery Management |
|---|---|
Use Scenario: Managing main SoC power-up/down and forced reset during OS crash or thermal shutdown. IC Role / Device Role / Timing Role: Load-switch controller coordinating P-FET gate drive, system-level RESET assertion, and battery-disconnect sequencing. Use Value: Enables clean 400ms power cycle with dual-path discharge to clear residual rail charge, preventing boot-loop failures after forced reset. | Use Scenario: Enabling long-term storage mode with zero parasitic drain while retaining fast wake-on-charger-insert capability. IC Role / Device Role / Timing Role: Shipping mode supervisor using OFF pin pulses and TAIN detection to gate battery-to-system connection. Use Value: Achieves <1µA system standby current and automatic exit from shipping mode within 50ms of charger plug-in, eliminating manual power-on steps. |
| Wearable Device Reset | Portable Medical Monitor |
Use Scenario: User-initiated hard reset via dual-button press (RST0+RST1) to recover unresponsive firmware without battery removal. IC Role / Device Role / Timing Role: Hardware reset coordinator enforcing 10s hold time and synchronized load switch turn-off. Use Value: Prevents accidental reset from brief button contact; guarantees full system power cycle only after deliberate user action. | Use Scenario: Ensuring fail-safe power isolation during patient disconnect or low-battery alarm conditions. IC Role / Device Role / Timing Role: Critical power gate controller using UVLO (1.43V) and RESET to enforce safe shutdown below battery cutoff voltage. Use Value: Guarantees complete system isolation at 1.43V with 500mV hysteresis, preventing brownout-induced data corruption in clinical recordings. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar load-switch controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TI TPS22919 | Single-channel, no reset timer or TAIN; 2.7–5.5V VIN range; 1.2µA IQ | Lacks factory-programmed RESET delay, dual discharge, and charger detection - suitable only for basic ON/OFF control | Select when system-level reset sequencing is handled by MCU and VIN stays within 2.7–5.5V |
| ON Semi NCP390 | Integrated P-FET (28mΩ); no RST0/RST1 inputs; 1.5µA IQ; 2.5–5.5V VIN | Monolithic solution eliminates external FET but removes programmable timing and TAIN functionality | Select when board space is critical and reset logic resides entirely in host processor |
Compared with TPS22919 and NCP390, MP6412GQGU-P uniquely combines ultra-low IQ (<2µA), factory-fixed 10s/400ms reset timing, dual discharge paths, and hardware TAIN detection - making it the only option for autonomous, charger-aware reset sequencing in 2.2–12V portable systems without MCU intervention.
Availability
MP6412GQGU-P is available at Aetrix Electronics and suitable for smartphone power sequencing, tablet battery management, wearable device reset, and portable medical monitor applications requiring stable component supply and guaranteed long-term availability.
Supply support for MP6412GQGU-P includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance power management ICs for consumer, industrial, and automotive markets, with design centers in the US, China, and Taiwan.
The MP6412 belongs to MPS's ultra-low-IQ load-switch controller product line, engineered specifically for battery-powered portable devices requiring autonomous power sequencing, long-term storage mode, and charger-triggered wake-up without host processor involvement.
FAQ
What is the purpose of the dual DCHG0 and DCHG1 pins?
DCHG0 and DCHG1 provide parallel 150Ω discharge paths to VOUT during RESET mode, enabling faster system energy clearance than single-path alternatives. They activate simultaneously when both RST0 and RST1 are held low for 10s and TAIN is low, reducing residual rail voltage to safe levels within 400ms. TAIN high disables both paths to prevent overheating when an external charger is connected.
How does the MP6412 handle conflicting input signals like RST0, OFF, and TAIN?
The MP6412 implements fixed hardware priority: RESET (RST0+RST1) > OFF > TAIN. If multiple signals assert simultaneously, only the highest-priority action executes - e.g., an active RESET overrides OFF pulse confirmation or TAIN high detection. This eliminates race conditions and ensures deterministic behavior without firmware coordination.
Can the reset delay time be modified after manufacturing?
No. The MP6412's reset timing parameters - including T1=10s entry delay and T2'=400ms off time - are factory-programmed and non-adjustable. There are no external resistors, capacitors, or digital interfaces to modify these values. Designers must select this part only when its fixed timing aligns with system-level reset requirements.
What is the role of the nSRO pin versus SRO?
SRO is a push-pull output driving the external P-FET gate directly, with controlled 1–3ms edges. nSRO is its open-drain complement, providing system-level status indication: high when load is on (via external pull-up), low when off, and floating in shipping mode. Unlike SRO, nSRO has no soft-start behavior and serves purely as a diagnostic signal.
Does the MP6412 require external components for basic operation?
Yes - an external P-channel MOSFET is mandatory for load switching, and a 100kΩ resistor is required between TAIN and the external charger to form the detection voltage divider. Input bypass capacitance (1µF ceramic) is also recommended for VIN stability. No timing or programming components are needed due to factory-fixed reset and shipping mode delays.
What happens if RST0 or RST1 is left floating?
RST0 and RST1 must not be floated: the datasheet explicitly prohibits it. Each has internal weak pull-up, but noise or leakage could cause unintended reset triggering. Proper design requires either pulling them to VIN via 100kΩ resistors (for active-low button interface) or connecting to a controlled GPIO. Floating pins risk spurious 10s reset activation and system instability.
Is the UTQFN-10 package compatible with standard reflow profiles?
Yes - the UTQFN-10 (1.4mm × 1.8mm) package uses standard Pb-free solder paste and supports IPC/JEDEC J-STD-020D reflow profiles. Its wettable flanks enable reliable automated optical inspection (AOI) of solder joints. Thermal resistance θJA = 140°C/W (4-layer board) confirms suitability for handheld thermal constraints without added heatsinking.
MP6412GQGU-P Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Monolithic Power Systems Inc.
- Package/Case:
- 10-UFQFN
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Switch Type:
- General Purpose
- Number of Outputs:
- 1
- Ratio - Input:Output:
- 1:1
- Output Configuration:
- High Side
- Output Type:
- P-Channel
- Interface:
- On/Off
- Voltage - Load:
- 2.2V ~ 12V
- Voltage - Supply (Vcc/Vdd):
- Not Required
- Current - Output (Max):
- -
- Rds On (Typ):
- -
- Input Type:
- Non-Inverting
- Features:
- Load Discharge
- Fault Protection:
- Over Temperature, UVLO
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-UTQFN (1.4x1.8)
MP6412GQGU-P FAQ
1.How can I place an order for MP6412GQGU-P through Aetrix?
Please submit a Request for Quotation (RFQ) for MP6412GQGU-P on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MP6412GQGU-P reliable?
The price and inventory of MP6412GQGU-P are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MP6412GQGU-P is usually 5 days.
3.What payment methods are accepted for MP6412GQGU-P?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MP6412GQGU-P transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MP6412GQGU-P?
MP6412GQGU-P orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MP6412GQGU-P order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MP6412GQGU-P?
For technical support, including MP6412GQGU-P datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MP6412GQGU-P requirements.
6.How does Aetrix verify that MP6412GQGU-P is sourced from the original manufacturer or authorized distributors?
All MP6412GQGU-P products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MP6412GQGU-P meets industry standards.
7.What is the process for return or replacement of MP6412GQGU-P?
All MP6412GQGU-P units undergo pre-shipment inspection (PSI). If there is an issue with MP6412GQGU-P, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MP6412GQGU-P part is unused and in its original packaging.
Return procedure for MP6412GQGU-P:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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