Monolithic Power Systems Inc. MP6900DJ-LF-P

Overview

MP6900DJ-LF-P from Monolithic Power Systems is a fast turn-off intelligent synchronous rectifier controller designed for secondary-side replacement of Schottky diodes in flyback converters. It regulates external MOSFET forward voltage to 70 mV, achieves 20 ns total turn-off delay, supports CCM/DCM/QR topologies, and operates with VDD from 8 V to 24 V - enabling up to 1.5 W power savings in notebook adapters.

For engineers reviewing the MP6900DJ-LF-P datasheet, MP6900DJ-LF-P pinout, MP6900DJ-LF-P application, or MP6900DJ-LF-P equivalent, key selection criteria include its 70 mV V_DS regulation accuracy, 20 ns turn-off propagation delay, TSOT23-5 thermal performance (θ_JA = 220 °C/W), support for high-side/low-side rectification, and compatibility with logic-level and standard MOSFETs.

Technical Context

The MP6900DJ-LF-P implements adaptive gate drive control to maintain ~70 mV forward voltage across the external MOSFET during conduction, dynamically adjusting VG to regulate V_DS even at light loads. Its blanking circuit enforces a 200 ns minimum on-time and modifies turn-off threshold to +50 mV during turn-on to prevent false triggering from ringing.

Turn-off is triggered when V_SS–V_D exceeds 30 mV (typ), with 15 ns propagation delay and 20 ns total delay (C_LOAD = 5 nF). Thermal shutdown activates at 170 °C (hysteresis 50 °C), and UVLO ensures operation only within 8–24 V VDD range, with 6.0 V rising threshold and 1.2 V hysteresis.

Key Specifications

Pinout & Package

MP6900DJ-LF-P uses the TSOT23-5 package (2.9 mm × 1.6 mm × 0.95 mm), featuring exposed pad for thermal enhancement and JEDEC MO-193-AA compliance. Pin 1 (VG) drives the external MOSFET gate; Pin 2 (VSS) serves as signal ground and V_D reference; Pin 3 (VDD) accepts 8–24 V supply; Pin 4 (V_D) senses drain voltage for zero-crossing detection; Pin 5 (PGND) provides low-inductance return path for gate driver current.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar synchronous rectifier controller applications.

Compared with NCP4306DR2G, MP6900DJ-LF-P delivers tighter V_DS regulation and faster turn-off for higher light-load efficiency; versus IR11672-based solutions, it offers single-chip integration and lower system-level BOM count at the expense of primary-side voltage headroom.

Availability

MP6900DJ-LF-P is available at Aetrix Electronics and suitable for USB-C notebook adapters, industrial flyback PSUs, and battery-powered systems requiring stable component supply, RoHS-compliant packaging, and long-term production continuity.

Supply support for MP6900DJ-LF-P includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and power ICs, with design centers in the US, China, and Taiwan, and global manufacturing partnerships.

The MP6900 product line targets high-efficiency AC/DC secondary-side power conversion, specifically engineered to replace Schottky diodes in flyback topologies while delivering measurable power savings, thermal relief, and regulatory compliance in compact form factors.

FAQ

What is the maximum recommended MOSFET R_DS(on) for use with MP6900DJ-LF-P in a 5 A application?

The MP6900DJ-LF-P datasheet recommends selecting an external MOSFET with R_DS(on) no lower than 7 mΩ for 5 A output current. This ensures the controller can effectively regulate V_DS to ~70 mV without excessive gate drive saturation, balancing conduction loss reduction against gate drive overhead and body diode conduction time.

Does MP6900DJ-LF-P support high-side rectification in flyback converters?

Yes, MP6900DJ-LF-P explicitly supports both high-side and low-side synchronous rectification configurations. Its V_D sensing architecture and floating gate drive capability allow direct connection to the transformer secondary winding regardless of MOSFET orientation, provided V_D remains within –0.7 V to +180 V absolute rating.

How does the 200 ns blanking period affect minimum duty cycle in CCM operation?

The 200 ns blanking period enforces a minimum on-time, limiting usable duty cycle in continuous conduction mode. For reliable operation, synchronous rectification period must exceed 200 ns to avoid shoot-through; this constrains minimum switching frequency in CCM flyback designs to approximately 500 kHz when operating near 50% duty cycle.

Can MP6900DJ-LF-P operate with a 5 V auxiliary supply?

No - MP6900DJ-LF-P requires VDD between 8 V and 24 V per its absolute maximum ratings and UVLO specification (6.0 V rising threshold). A 5 V supply falls below UVLO and will prevent startup; an external bias winding or charge pump is required to generate ≥8 V for VDD in low-output-voltage applications.

What is the purpose of the PGND pin, and how should it be routed on the PCB?

PGND (Pin 5) is the dedicated power ground return for the gate driver's high-current switching path. It must be connected with a short, low-inductance trace directly to the source of the external MOSFET and tied to the main ground plane via multiple vias - separate from signal ground (VSS) to prevent noise coupling into the V_D sensing node.

Is thermal shutdown reset automatically after temperature decreases?

Yes - thermal shutdown triggers at 170 °C junction temperature and releases automatically when junction temperature falls to 120 °C due to built-in 50 °C hysteresis. No external reset or power cycle is required; the device resumes normal operation once thermally stabilized.

Does MP6900DJ-LF-P require an external pull-up resistor on the VG pin?

No - MP6900DJ-LF-P integrates a 10 kΩ internal pull-down resistor on VG and active push-pull gate drive circuitry. External pull-up components are unnecessary and would interfere with the controller's adaptive V_DS regulation function and fast turn-off capability.