Monolithic Power Systems Inc. MP6922DSE-LF-Z

Overview

MP6922DSE-LF-Z from Monolithic Power Systems is a dual fast turn-off intelligent synchronous rectification controller for LLC resonant converters, driving two N-channel MOSFETs with 70mV V_DS regulation, 20ns total turn-off delay, and integrated reverse current protection. It operates from 8V–24V V_DD, supports CCM/CrCM/DCM modes, and targets high-efficiency AC-DC adapters and telecom SMPS.

For engineers reviewing the MP6922DSE-LF-Z datasheet, MP6922DSE-LF-Z pinout, MP6922DSE-LF-Z application, or MP6922DSE-LF-Z equivalent, key selection criteria include forward-voltage regulation accuracy, light-load quiescent current (<600µA), RCP latch timing (100µs), SOIC8 package thermal resistance (θ_JA = 90°C/W), and gate driver pull-down impedance (1–2Ω).

Technical Context

The MP6922DSE-LF-Z implements dual-channel adaptive synchronous rectification using voltage-sense-based turn-on/turn-off control: it triggers MOSFET turn-on at –70mV V_DS (typical) with ~200ns delay and turn-off at +30mV with 20ns total propagation delay. Its blanking logic enforces minimum on-time (~1µs) and off-time (1.6µs) to prevent shoot-through in high-frequency LLC topologies.

It integrates three critical protection functions: reverse current protection (RCP) latched for 100µs when RCP pin voltage exceeds 3V; thermal shutdown at 150°C with 30°C hysteresis; and dual UVLO thresholds-V_DD (6.0V rising) and EN pin (1.5V rising)-ensuring robust start-up sequencing and standby compliance.

Key Specifications

Pinout & Package

MP6922DSE-LF-Z is housed in an 8-pin SOIC package (JEDEC MS-012 variation AA) with exposed pad omitted (SOIC8, not SOIC8E). Pin 1 is VG2 (Channel 2 gate driver output); Pin 2 is EN (enable with 1.5V rising threshold); Pin 3 is VD2 (Channel 2 drain sense); Pin 4 is VS2 (Channel 2 source reference); Pin 5 is VS1 (Channel 1 source reference); Pin 6 is VD1 (Channel 1 drain sense); Pin 7 is V_DD (8–24V supply); Pin 8 is VG1 (Channel 1 gate driver output). PGND is internal to die and connected via substrate to pins 4/5.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-channel synchronous rectification controller applications.

Compared with NCP4306DR2G, MP6922DSE-LF-Z reduces component count by 50%, cuts turn-off delay by half, and adds RCP-critical for telecom CCM reliability. Versus discrete MOSFETs, it delivers 1.8W lower conduction loss at 15A and enables sub-0.5W standby via intelligent latch-off.

Availability

MP6922DSE-LF-Z is available at Aetrix Electronics and suitable for AC-DC adapters, LCD TV power supplies, and telecom SMPS requiring stable component supply, RoHS-compliant packaging, and long-term lifecycle support.

Supply support for MP6922DSE-LF-Z includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and power ICs, with design centers in the US, China, and Taiwan.

The MP6922 product line delivers intelligent synchronous rectification controllers optimized for high-frequency LLC and resonant converters in energy-efficient power supplies targeting consumer, computing, and telecom markets.

FAQ

What is the maximum recommended PCB copper area for the MP6922DSE-LF-Z SOIC8 thermal pad connection?

The SOIC8 package has no exposed thermal pad; thermal dissipation relies on lead-frame conduction through pins 4 (VS2) and 5 (VS1) to PCB ground planes. For 1.4W continuous dissipation at TA=85°C, a minimum 250mm² 2-oz copper pour connected to both VS pins is required to maintain TJ <125°C per θ_JA=90°C/W specification.

How does the MP6922DSE-LF-Z handle simultaneous turn-on of both channels during startup?

Each channel operates independently with separate VD/VS sense paths and gate drivers. Startup sequencing is determined by individual drain-source voltage conditions-not synchronized. If both MOSFETs experience negative V_DS simultaneously, both channels turn on within 200ns, but blanking logic ensures minimum 1µs on-time to prevent overlap-induced shoot-through.

Can the MP6922DSE-LF-Z be used with logic-level MOSFETs having V_GS(th) as low as 1.0V?

Yes-the MP6922DSE-LF-Z drives gates to V_DD–2.2V (min) when V_DD<16V, ensuring >10V gate overdrive for standard and logic-level FETs. Its 70mV V_DS regulation loop actively adjusts gate voltage to maintain optimal conduction regardless of threshold voltage spread.

What external components are mandatory for basic MP6922DSE-LF-Z operation?

Mandatory components are: (1) 100nF ceramic capacitor from V_DD to VS1/VS2; (2) 10kΩ pull-down on EN if not actively driven; (3) 10Ω gate resistors in series with VG1/VG2 outputs to damp ringing. No external timing or feedback components are required-the IC is fully self-contained.

Does the RCP function require an external voltage divider on the RCP pin?

No-the RCP pin is absent in the SOIC8 (MP6922DSE) package. Reverse current protection is implemented internally using VD1/VD2 sensing only. The RCP pin exists solely on SOIC14 (MP6922DS) for adjustable threshold; SOIC8 users rely on fixed 3V internal comparator activation.

How is light-load mode exit triggered in MP6922DSE-LF-Z?

Exit occurs when the MOSFET body diode conduction period exceeds 2.4µs-detected by monitoring V_DS crossing –250mV (V_LL-DS). Upon detection, the gate driver unlatches within one switching cycle, restoring full synchronous rectification without software intervention or external signals.

What is the impact of V_DD ripple on MP6922DSE-LF-Z regulation accuracy?

V_DD ripple up to 1Vpp has negligible effect: internal bandgap reference and regulation loop are supply-independent. However, ripple exceeding the 0.5V UVLO hysteresis may cause intermittent enable/disable cycling-so V_DD must be filtered to stay within 5.5V–6.5V window during steady-state operation.