Monolithic Power Systems Inc. MP6924GS-Z

Overview

MP6924GS-Z from Monolithic Power Systems is a dual-channel, fast turn-off synchronous rectifier IC designed for LLC resonant converters operating in CCM, DCM, and CrCM. It drives two N-channel MOSFETs with 35ns total turn-off delay, regulates forward voltage drop to 45mV (MP6924), and latches gate drivers under light-load conditions to limit quiescent current to 175µA. It enables high-efficiency secondary-side rectification in notebook adapters and PC power supplies.

For engineers reviewing the MP6924GS-Z datasheet, MP6924GS-Z pinout, MP6924GS-Z application, or MP6924GS-Z equivalent, key selection criteria include forward voltage threshold (45mV), turn-off blanking time (210ns), SOIC-8 package compatibility, light-load latch-off timing (1.52ms max enter delay), and dual-channel independent sensing of VD1/VSS and VD2/VSS for high-side/low-side configurations.

Technical Context

The MP6924GS-Z implements adaptive gate control using drain-source voltage (VDS) sensing on both channels to dynamically regulate MOSFET conduction-turning on when VDS falls below –230mV (body diode conduction) and turning off before current reversal at +40mV. Its anti-bounce logic prevents cross-conduction by blanking one channel's gate driver during the other's turn-off transition.

It supports wide-input operation from 4.2V to 35V VDD, features integrated UVLO (3.95V rising threshold), thermal shutdown at 150°C with 10°C hysteresis, and programmable light-load entry via external resistor on LL pin. The IC operates with minimal external components and requires separate, non-coupled sensing loops for VD1/VSS and VD2/VSS to maintain noise immunity in high-dv/dt LLC environments.

Key Specifications

Pinout & Package

MP6924GS-Z is housed in a standard SOIC-8 package with exposed pad not electrically connected. Pin functions are validated per Monolithic Power Systems Rev. 1.02 datasheet (2017) and support independent high-side and low-side synchronous rectification layouts.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-channel LLC synchronous rectifier applications.

Compared with MP6924AGS-Z, MP6924GS-Z trades lower forward voltage for superior noise immunity via shorter blanking time and anti-bounce logic-critical in compact, unshielded adapters. Against NCP4306DR2G, it delivers integrated dual-channel control with light-load optimization, reducing BOM count and PCB footprint by 30%.

Availability

MP6924GS-Z is available at Aetrix Electronics and suitable for AC/DC adapters, desktop PC power supplies, and isolated DC/DC power converters requiring stable component supply, long-term lifecycle support, and RoHS-compliant sourcing.

Supply support for MP6924GS-Z includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and power ICs, with design centers in the US, China, and Taiwan, and global manufacturing partnerships.

The MP6924 product line targets high-efficiency LLC resonant converter designs, delivering intelligent synchronous rectification with adaptive voltage sensing, fast turn-off, and light-load optimization for energy-sensitive power systems.

FAQ

What is the maximum allowable V_D voltage on pins VD1 and VD2?

The absolute maximum V_D rating is +180V relative to VSS. This allows direct connection to high-voltage secondary windings in 24V-output LLC converters without external clamping. Operation above this level risks permanent damage to the internal JFET input stage.

How does the LL pin affect gate driver behavior under light load?

Pulling LL low disables both gate drivers entirely, reducing current draw to 175µA. Leaving LL open prevents light-load mode entry. Connecting a resistor (e.g., 100kΩ) sets the latch-off delay to 1.52ms max; below this conduction period, drivers are latched off until next cycle begins.

Can MP6924GS-Z drive both high-side and low-side MOSFETs in the same LLC transformer?

Yes-its independent VD1/VSS and VD2/VSS sensing paths and separate VG1/VG2 outputs support simultaneous high-side and low-side synchronous rectification in center-tapped or full-wave LLC secondaries, provided sensing loops are physically isolated.

What is the purpose of the 210ns turn-off blanking time?

The 210ns blanking window prevents false turn-off triggering caused by voltage spikes during MOSFET switching transitions. It ensures the gate remains active through transient noise, maintaining conduction stability in high-dv/dt LLC environments.

Does MP6924GS-Z require external components beyond decoupling capacitors?

Only an optional resistor on LL for light-load timing and external MOSFETs are required. No external timing capacitors, bootstrap diodes, or gate resistors are needed-the IC integrates all control logic, drivers, and protection circuitry in the SOIC-8 package.

How does anti-bounce logic improve reliability in dual-channel operation?

Anti-bounce logic blanks one channel's gate driver during the other's turn-off transition, preventing simultaneous conduction (shoot-through) in shared transformer configurations. This eliminates cross-conduction risk without requiring external dead-time control circuitry.

What thermal protection mechanisms are built into MP6924GS-Z?

It features thermal shutdown at 150°C with 10°C hysteresis. When junction temperature exceeds 150°C, VG1 and VG2 are pulled low to halt switching. Normal operation resumes automatically once die temperature drops below 140°C.