Monolithic Power Systems Inc. MP6925GS-Z

Overview

MP6925GS-Z from Monolithic Power Systems is a dual-channel, fast-turn-off synchronous rectifier IC designed for LLC resonant converters operating in CCM, CrCM, and DCM. It drives two N-channel MOSFETs with 35ns total turn-off delay, regulates forward voltage drop to 29mV (typ), supports 4.2V–35V VDD input, and features light-load latching at 175µA quiescent current. Used in high-efficiency AC/DC adapters and PC power supplies.

For engineers reviewing the MP6925GS-Z datasheet, MP6925GS-Z pinout, MP6925GS-Z application, or MP6925GS-Z equivalent, this page delivers verified functional identity, SOIC-8 package mapping, validated dual-channel gate driver timing, noise-immune VD sensing architecture, and confirmed CCM/DCM compatibility - all critical for LLC secondary-side rectifier selection and layout-sensitive design.

Technical Context

The MP6925GS-Z implements adaptive zero-current detection via dual VD1/VSS and VD2/VSS sense inputs, with programmable light-load entry using external resistor on LL pin. Its control logic enforces 1.1µs turn-on blanking and 1750ns turn-off blanking to suppress false triggering during fast transients.

It integrates independent gate drivers (VG1/VG2) capable of 13V high-side output (VDD > 10V), 0.1V low-level pull-down, and 0.6Ω effective pull-down impedance. The IC uses internal high-voltage JFET input stages to tolerate up to 180V drain-sense voltage while maintaining ±40mV turn-off threshold accuracy.

Key Specifications

Pinout & Package

MP6925GS-Z is housed in an SOIC-8 package with exposed thermal pad (PGND-connected), optimized for surface-mount assembly and thermal dissipation in high-density power designs.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-channel LLC synchronous rectifier applications.

Compared with NCP4306DR2G and discrete MOSFET+driver solutions, MP6925GS-Z delivers single-package dual-channel control, 10ns faster turn-off, integrated light-load latching, and unified VDD biasing - reducing component count by 3+ parts and improving system-level efficiency by 0.8% at 20% load.

Availability

MP6925GS-Z is available at Aetrix Electronics and suitable for AC/DC adapters, PC power supplies, and LCD/LED TV power systems requiring stable component supply, RoHS-compliant sourcing, and long-term lifecycle support.

Supply support for MP6925GS-Z includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance power management ICs, with over 20 years of expertise in DC/DC conversion, LED drivers, and motor control.

The MP6925 belongs to MPS's intelligent synchronous rectifier product line, engineered specifically for high-frequency LLC resonant converters demanding ultra-fast turn-off, multi-mode compatibility, and noise-immune secondary-side control.

FAQ

What is the maximum drain-sense voltage rating for MP6925GS-Z?

The MP6925GS-Z supports VD1 and VD2 inputs from −1V to +180V relative to VSS. This rating is validated per Absolute Maximum Ratings table and enables direct connection to high-voltage secondary windings without external voltage dividers or clamping circuits.

How does the light-load latch-off function reduce power loss?

When enabled via the LL pin, the MP6925GS-Z monitors VG1 pulse width each cycle. If pulses remain below 0.6V for longer than 45–121µs, it latches off both gate drivers, reducing quiescent current to 175µA - cutting driver-stage losses by >90% compared to active operation at light loads.

Can MP6925GS-Z drive both high-side and low-side SR MOSFETs simultaneously?

Yes. Its independent VD1/VSS and VD2/VSS sense inputs, plus separate VG1/VG2 outputs, allow concurrent high-side and low-side rectification on separate windings or phases - confirmed in Typical Application schematic and Pin Functions table.

What is the recommended minimum R_DS(on) for SR MOSFETs used with MP6925GS-Z?

Per Application Information section, R_DS(on) should be ≥ V_fwd/I_OUT. For example, at 29mV V_fwd and 10A output, minimum R_DS(on) = 2.9mΩ. Lower values cause excessive gate drive attenuation, diminishing efficiency gains.

Does MP6925GS-Z require external components for basic operation?

Yes - minimal external components include: 1µF VDD decoupling capacitor, optional LL timing resistor (100kΩ typical), and 22pF capacitor on LL if light-load mode is disabled. No external bootstrap, feedback, or compensation networks are needed.

How does the 35ns turn-off delay improve CCM performance?

The 35ns total turn-off delay ensures MOSFETs turn off before reverse current begins, eliminating shoot-through risk in CCM. This is validated by timing diagrams showing VGS collapse within 35ns of VDS crossing −40mV, preventing cross-conduction in fast transient conditions.

Is MP6925GS-Z pin-compatible with earlier MP6924 or MP6903 variants?

No. MP6925GS-Z has distinct pin assignments: VG1 is on pin 8 (not pin 1), VD1 is on pin 6 (not pin 4), and LL is on pin 3 (not present on MP6924). Layout redesign is required; refer to SOIC-8 top view diagram in datasheet Rev. 1.0.