Monolithic Power Systems Inc. MP6928AGS-Z

Overview

MP6928AGS-Z from Monolithic Power Systems is a dual-channel, fast-turn-off intelligent rectifier IC designed for synchronous rectification in LLC-resonant converters. It drives two N-channel MOSFETs with adaptive forward-voltage regulation (VFWD-HIGH: 32–75 mV; VFWD-LOW: 70–140 mV), ultra-low sleep-mode current (<150 µA), and reverse-current protection. It operates across 4.3V–35V VDD and supports CCM, CrCM, and DCM modes in AC/DC adapters and telecom SMPS.

For engineers reviewing the MP6928AGS-Z datasheet, MP6928AGS-Z pinout, MP6928AGS-Z application, or MP6928AGS-Z equivalent, key selection criteria include turn-off total delay (35–100 ns), light-load latch-off timing (tLL ≈ 75 µs), VD1/VD2 voltage-sense capability up to 200V, and SOIC-8 package compatibility with high-side/low-side rectifier layouts.

Technical Context

The MP6928AGS-Z implements dual independent control channels with adaptive VFWD switching between two forward-voltage thresholds to optimize conduction loss vs. gate drive loss. Each channel features dedicated VD sense inputs, blanking timers (tBON: 0.65–1.45 µs; tBOFF: 1.15–2.25 µs), and thermal shutdown at 160°C with 25°C hysteresis.

Its functional block integrates high-voltage JFET input clamping on VD pins (rated to 200V), UVLO with 4.05V rising threshold and 0.28V hysteresis, and latched light-load mode triggered when VG1/2 remains below 2.5V for ≥75 µs-enabling sub-150 µA quiescent operation during burst-mode operation.

Key Specifications

Pinout & Package

MP6928AGS-Z is housed in an SOIC-8 package with exposed PGND pad for thermal performance and standard 1.27 mm pitch. Pin numbering follows JEDEC MS-012, with GND and PGND separated for noise isolation between logic and power grounds.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar intelligent synchronous rectifier applications.

Compared with MP6928AGS-Z, MP6929GQ delivers faster turn-off, higher VD ruggedness, and simplified BOM via integrated LL function - making it the preferred choice for new designs; SRK1001MTR offers lower cost but sacrifices adaptive control, dual-channel capability, and standby compliance.

Availability

MP6928AGS-Z is available at Aetrix Electronics and suitable for AC/DC adapters, LCD/PDP TV power supplies, and telecom SMPS requiring stable component supply through extended production lifecycles.

Supply support for MP6928AGS-Z includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance power management ICs, including DC/DC converters, LED drivers, motor drivers, and intelligent rectifiers.

The MP6928A belongs to MPS's intelligent synchronous rectifier product line, engineered specifically for high-efficiency LLC and resonant converter topologies demanding adaptive VFWD control and ultra-low standby power.

FAQ

Is MP6928AGS-Z recommended for new designs?

No. Monolithic Power Systems explicitly states "NOT RECOMMENDED FOR NEW DESIGNS, REFER TO MP6929" in the official datasheet. MP6929GQ is the designated successor with improved timing, ESD, and integration. MP6928AGS-Z remains available for legacy production and repair, but new schematics should use MP6929GQ.

What is the maximum allowable VD voltage, and how is overvoltage protected?

The VD1 and VD2 pins tolerate −1V to +200V per absolute maximum ratings. Protection is implemented via an integrated high-voltage JFET at each VD input, combined with a recommended 1kΩ series resistor between VD and the MOSFET drain to limit current during negative transients below −0.7V.

How does the light-load latch-off function reduce power consumption?

When VG1/2 remains below 2.5V for ≥75 µs (tLL), the IC disables both gate drivers and enters a latched low-current state drawing <150 µA. This eliminates gate drive losses during burst-mode idle periods - a key enabler for meeting 0.5W Energy Star standby limits.

Can MP6928AGS-Z drive both high-side and low-side MOSFETs in the same design?

Yes. The IC supports both configurations: VD1/VG1 and VD2/VG2 operate independently, allowing one channel to control a high-side MOSFET (with VSS tied to output rail) and the other a low-side MOSFET (with VSS tied to common ground), provided sensing loops are isolated per datasheet layout guidelines.

What is the purpose of the LL pin, and how is it configured?

The LL pin sets the light-load exit delay (tExit-Delay) by connecting a resistor to GND. Using Equation (1) from the datasheet, tExit-Delay = R_LL(kΩ) × 50 µs. Leaving LL floating disables light-load mode; pulling LL low eliminates the exit delay entirely.

Does MP6928AGS-Z include thermal shutdown, and what is its behavior?

Yes. Thermal shutdown activates at 160°C junction temperature, forcing VG1 and VG2 low. Operation resumes only after junction temperature falls by 25°C (hysteresis), ensuring stable recovery without oscillation. This is guaranteed by characterization, not just design simulation.

What are the key PCB layout requirements for stable operation?

Critical layout rules include: (1) Kelvin routing of VD1/VSS and VD2/VSS directly to MOSFET drain/source pads; (2) separation of both sensing loops; (3) placement of ≥1 µF VDD decoupling capacitor within 2 mm of VDD/PGND; (4) avoidance of routing power loops over or under sensing traces.