Monolithic Power Systems Inc. MP8759GD-Z
- Part No.:
- MP8759GD-Z
- Manufacturer:
- Monolithic Power Systems Inc.
- Package:
- 12-PowerVFQFN
- Datasheet:
-
MP8759GD-Z.pdf
- Description:
- IC REG BUCK ADJ 8A 12QFN
- Quantity:
- Payment:

- Shipping:

Inventory:13,459
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Product details
Overview
MP8759GD-Z from Monolithic Power Systems is a fully integrated, synchronous step-down DC/DC converter delivering 8A continuous and 10A peak output current from a 4.5V–26V input. It employs adaptive constant-on-time (COT) control, features 117μA quiescent current, 1% reference voltage accuracy, and integrates high- and low-side MOSFETs with 25mΩ/12mΩ RDS(ON) in a QFN-12 (2mm×3mm) package. It is used in high-density power rails for portable computing and display systems.
For engineers reviewing the MP8759GD-Z datasheet, MP8759GD-Z pinout, MP8759GD-Z application, or MP8759GD-Z equivalent, key selection considerations include its ultrasonic mode (USM) for audible-noise-sensitive designs, DC auto-tune loop for tight line/load regulation, integrated OCP/OVP/UVP/hiccup thermal shutdown, and compatibility with pure ceramic output capacitors without external compensation in most cases.
Technical Context
The MP8759GD-Z implements adaptive COT control with internal ramp compensation to stabilize operation with ceramic output capacitors, eliminating need for external type-II/type-III compensation networks. Its DC auto-tune loop dynamically adjusts the reference comparator offset to maintain <±0.5% DC output error across line and load variations while preserving fast transient response.
It supports three operating modes via the MODE pin: forced PWM (>2.6V), PFM with ultrasonic mode (floating), and PFM without USM (grounded). Valley-current-based over-current protection uses the low-side MOSFET's RDS(ON) for sensing, enabling cycle-by-cycle limiting at 10.5–13.5A with hiccup recovery under sustained fault conditions.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 4.5V to 26V - supports wide industrial and adapter-fed inputs including 12V/19V laptop rails and 24V industrial buses. |
| Output Current | 8A continuous / 10A peak - enables single-chip supply for CPU core, GPU, or SoC I/O rails without parallel converters. |
| Quiescent Current | 117μA - minimizes standby power loss in always-on subsystems such as USB-C PD controllers or display management ICs. |
| Reference Voltage | 600mV ±1% - ensures precise output setting down to 0.6V, critical for low-voltage logic rails (e.g., 0.8V DDR memory). |
| Switching Frequency | 700kHz fixed - balances efficiency, EMI, and inductor size; supports compact 0.68µH inductors with minimal core loss. |
| Protection Features | OCP (valley-current), OVP (122% VREF trip), UVP-1/UVP-2 (75%/50% VREF), thermal shutdown (150°C), hiccup recovery - provides robust fault containment without external circuitry. |
| Package | QFN-12 (2mm × 3mm, 0.5mm pitch) - enables high-power density PCB layouts with thermal pad for efficient heat dissipation in space-constrained applications. |
Pinout & Package
MP8759GD-Z is housed in a thermally enhanced QFN-12 package (2mm × 3mm, 0.5mm pitch) with an exposed thermal pad on the bottom side. The package supports reflow soldering per JEDEC J-STD-020 and requires PCB land pattern per MPS AN-042 guidelines for optimal thermal performance and reliability.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 VIN | Primary power input | Supplies internal LDO and power switches; must be decoupled with ≥10µF ceramic capacitor close to pin; wide trace/via network required for 10A peak current. |
| 2 PGND | Power ground return | Kelvin connection point for high-current inductor return path; requires dedicated copper pour and multiple thermal vias to minimize ground bounce and thermal resistance. |
| 3 PG | Open-drain power-good indicator | Signals valid output (95–105% VREF) after 500µs delay; requires external pull-up (e.g., 100kΩ to VCC) for system sequencing and fault detection. |
| 4 NC | No-connect terminal | Must remain unconnected and floating; no routing or copper allowed under this pad to prevent parasitic coupling or solder bridging. |
| 5 VOUT | Output voltage sense node | Kelvin feedback point for regulation; must connect directly to output capacitor anode with >25mil trace, avoiding SW node proximity and vias to reduce noise injection. |
| 6 MODE | Operating mode select | Digital input controlling PFM/PWM/USM behavior: >2.6V = forced PWM; floating = PFM+USM; GND = PFM only - enables dynamic efficiency optimization. |
| 7 SW | Switch node | Drives external inductor; swings from ~–0.3V to VIN; requires shortest possible trace, minimized copper area, and separation from sensitive analog nodes to limit EMI. |
| 8 BST | Bootstrap supply | Connects to SW via 0.1µF X7R ceramic capacitor to generate floating gate drive for high-side MOSFET; capacitor must be placed adjacent to BST/SW pins. |
| 9 VCC | Internal LDO output | Powers control circuitry; requires ≥1µF X7R/X5R ceramic capacitor placed within 2mm of pin to suppress switching noise and ensure stable bias. |
| 10 AGND | Analog ground reference | Separate Kelvin return for FB, EN, MODE, and PG; must tie to PGND at single-point star ground near thermal pad to avoid noise coupling into regulation loop. |
| 11 FB | Feedback input | Resistor-divider tap for output voltage setting; internal 600mV reference enables 0.6V–5.5V outputs; sensitive to noise - keep away from SW and PGND loops. |
| 12 EN | Enable control | Active-high digital input; rising threshold 1.25V ±0.1V; includes UVLO hysteresis; internal discharge FET activates when low to rapidly collapse output during shutdown. |
Key Features
| Feature | Design Value |
|---|---|
| Adaptive Constant-On-Time (COT) Control | Delivers <10µs load-step response with no external loop compensation needed - ideal for FPGA, ASIC, and processor core rails with dynamic current demands. |
| Ultrasonic Mode (USM) | Maintains switching frequency >20kHz during light/no-load conditions to eliminate audible coil whine in tablets and monitors without sacrificing efficiency. |
| DC Auto-Tune Loop | Corrects long-term DC errors between FB and VREF using slow analog feedback - achieves ±0.2% typical load regulation and ±0.1% line regulation over full temperature range. |
| Integrated Output Discharge | Activates internal 6Ω FET when EN = low - discharges output to safe level within milliseconds, preventing back-powering of downstream circuits during hot-swap or reset. |
| Valley-Current Over-Current Protection | Uses low-side MOSFET RDS(ON) for sensing - eliminates need for external current-sense resistor and associated power loss, saving board space and BOM cost. |
Applications
| Laptop Core Power Rail | Tablet SoC Supply |
|---|---|
|
Use Scenario: Powers CPU/GPU cores in thin-and-light notebooks requiring 0.8V–1.2V at up to 8A with rapid load transients during burst-mode execution. IC Role / Device Role / Timing Role: Primary synchronous buck regulator with adaptive COT control providing sub-10µs transient response and seamless PFM-to-PWM mode transition. Use Value: Eliminates need for external compensation or current-sense resistors while maintaining <±1% output accuracy across –40°C to +125°C junction temperature. |
Use Scenario: Supplies application processor and memory I/O in Android/iOS tablets where board space, acoustic noise, and standby power are critical constraints. IC Role / Device Role / Timing Role: High-efficiency step-down converter operating in ultrasonic PFM mode at light load (<100mA) and forced PWM above 500mA. Use Value: Achieves >92% efficiency at 10mA load and <120μA total system quiescent current, extending battery life without audible switching noise. |
| Flat-Panel Display Logic Supply | Networking System PoL Converter |
|
Use Scenario: Generates 3.3V/5V logic rail for timing controllers and interface ICs in LCD/OLED panels where EMI and thermal density are tightly constrained. IC Role / Device Role / Timing Role: Compact, thermally optimized DC/DC converter with integrated MOSFETs and QFN-12 package enabling direct placement behind display bezels. Use Value: Delivers 8A continuous current in 6mm² footprint with thermal resistance θJA = 70°C/W - reduces heatsink requirements and improves panel mechanical design flexibility. |
Use Scenario: Provides point-of-load (PoL) conversion for FPGA I/O banks or switch ASICs in enterprise switches and routers with 12V or 48V intermediate bus. IC Role / Device Role / Timing Role: Robust, protected buck regulator supporting wide input (4.5–26V) and featuring hiccup-mode OCP/UVP for fault-tolerant operation in unattended infrastructure. Use Value: Integrates full protection set (OVP/UVP/thermal/OCP) and power-good signaling - simplifies system-level safety certification and reduces reliance on external supervisors. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous step-down converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| RTQ2132BGQW | Higher 36V max input, lower 6A continuous rating, 1.2V reference, requires external compensation network. | Better suited for 24V industrial PoL; less suitable for ultra-low-VOUT or space-constrained portable designs due to larger 3mm×3mm QFN and compensation overhead. | Select when input exceeds 26V or when higher VREF tolerance eases resistor divider design; avoid if ceramic-capacitor-only layout or <0.8V output is required. |
| TPS54821RHLR | Fixed 500kHz frequency, 12A rating, external VSENSE, no integrated USM, requires external current-sense resistor and compensation. | Targeted at high-current server VRMs; lacks ultrasonic mode and low-IQ optimization - unsuitable for battery-powered or noise-sensitive displays. | Choose only when >8A peak is mandatory and board area allows larger package (4mm×4mm QFN) and extra passives; not recommended for portable or audio-critical applications. |
Compared with RTQ2132BGQW and TPS54821RHLR, the MP8759GD-Z offers superior integration (no external sense resistor or compensation), lower quiescent current, built-in USM, and smaller footprint - making it optimal for space- and noise-constrained portable electronics where 8A continuous output suffices.
Availability
MP8759GD-Z is available at Aetrix Electronics and suitable for laptop computers, tablet PCs, and flat-panel display logic supplies requiring stable component supply, consistent parametric performance, and long-term production continuity.
Supply support for MP8759GD-Z includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and power ICs, with design centers in the US, China, and Taiwan, and global manufacturing partnerships.
The MP8759 belongs to MPS' high-current monolithic buck converter product line, engineered specifically for compact, high-efficiency power delivery in portable computing and visual display systems where thermal density and acoustic performance are critical.
FAQ
What is the minimum output voltage supported by the MP8759GD-Z?
The MP8759GD-Z supports output voltages as low as 0.6V, set by the internal 600mV reference voltage and an external resistor divider on the FB pin. This enables direct regulation of modern low-voltage logic rails such as 0.8V CPU cores or 1.0V DDR interfaces without external amplification or reference scaling.
Does the MP8759GD-Z require external compensation components?
No - the MP8759GD-Z uses internal ramp compensation and a DC auto-tune loop, allowing stable operation with pure ceramic output capacitors without external type-II or type-III compensation networks. External ramp injection (~20mV) is optional only for marginal stability cases with very low-ESR ceramics and extreme duty cycles.
How does the ultrasonic mode (USM) function, and how is it enabled?
USM keeps switching frequency above 20kHz during light-load conditions to eliminate audible coil whine. It is enabled automatically when the MODE pin is left floating (high-impedance), placing the device in PFM mode with USM activation. No configuration registers or firmware are required - operation is purely analog and pin-driven.
What thermal performance can be expected in a standard 4-layer PCB layout?
In a JEDEC JESD51-7 compliant 4-layer PCB (2oz copper, 1in² thermal pad area), the MP8759GD-Z achieves θJA = 70°C/W and θJC = 15°C/W. At 8A output with 12V input, typical case temperature rise is ~55°C above ambient, staying well below the 125°C max operating junction temperature with moderate airflow.
Can the MP8759GD-Z safely drive pre-biased outputs during start-up?
Yes - the MP8759GD-Z includes pre-bias start-up protection. When EN rises while VOUT is already biased, the IC disables both high- and low-side switches until the internal reference voltage exceeds the sensed FB voltage, preventing reverse current flow and output voltage overshoot.
What is the purpose of the VOUT pin, and why is its routing critical?
The VOUT pin provides a Kelvin sense connection directly to the output capacitor anode, enabling accurate regulation independent of PCB trace IR drop. Routing must use >25mil traces, avoid vias and proximity to SW node, and maintain separation from noisy grounds to prevent regulation error or instability from coupled noise.
How does the valley-current over-current protection work without a sense resistor?
The MP8759GD-Z measures the voltage across the low-side MOSFET's intrinsic RDS(ON) during its conduction phase to infer inductor valley current. This eliminates external sensing components while maintaining ±10% OCP accuracy across temperature and process variation, with hiccup-mode recovery for sustained faults.
MP8759GD-Z Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Monolithic Power Systems Inc.
- Series:
- -
- Package/Case:
- 12-PowerVFQFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 4.5V
- Voltage - Input (Max):
- 26V
- Voltage - Output (Min/Fixed):
- 0.6V
- Voltage - Output (Max):
- 5.5V
- Current - Output:
- 8A
- Frequency - Switching:
- 700kHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 12-QFN (2x3)
MP8759GD-Z FAQ
1.How can I place an order for MP8759GD-Z through Aetrix?
Please submit a Request for Quotation (RFQ) for MP8759GD-Z on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MP8759GD-Z reliable?
The price and inventory of MP8759GD-Z are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MP8759GD-Z is usually 5 days.
3.What payment methods are accepted for MP8759GD-Z?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MP8759GD-Z transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MP8759GD-Z?
MP8759GD-Z orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MP8759GD-Z order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MP8759GD-Z?
For technical support, including MP8759GD-Z datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MP8759GD-Z requirements.
6.How does Aetrix verify that MP8759GD-Z is sourced from the original manufacturer or authorized distributors?
All MP8759GD-Z products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MP8759GD-Z meets industry standards.
7.What is the process for return or replacement of MP8759GD-Z?
All MP8759GD-Z units undergo pre-shipment inspection (PSI). If there is an issue with MP8759GD-Z, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MP8759GD-Z part is unused and in its original packaging.
Return procedure for MP8759GD-Z:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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