Monolithic Power Systems Inc. MP8760GLE-Z

Overview

MP8760GLE-Z from Monolithic Power Systems is a fully integrated, synchronous step-down DC/DC converter delivering 6A output current from 4.5V–18V input with adaptive Constant-On-Time (COT) control, 1% reference voltage accuracy over −40°C to +125°C, and programmable 200kHz–1MHz switching frequency. It integrates high- and low-side MOSFETs (28mΩ/16mΩ R_DS(ON)), supports pre-bias startup, and provides open-drain power-good signaling for FPGA and ASIC core rail regulation.

For engineers reviewing the MP8760GLE-Z datasheet, MP8760GLE-Z pinout, MP8760GLE-Z application, or MP8760GLE-Z equivalent, key selection criteria include its non-latch OCP/OVP/thermal shutdown protection, 0.611V–13V adjustable output, soft-start capacitor programming, and QFN-16 (3mm×4mm) thermal performance (θ_JA = 46°C/W).

Technical Context

The MP8760GLE-Z implements adaptive COT control without an external oscillator-its one-shot ON-time timer is set via resistor on the FREQ pin and feed-forward compensated by VIN, enabling stable frequency across input variation. Internal dead-time prevents shoot-through between integrated high- and low-side MOSFETs during PWM transitions.

It operates in continuous-conduction mode (CCM) under heavy load and automatically enters skip-mode DCM at light load, reducing quiescent current to 760µA (typ) and improving no-load efficiency. Protection includes valley-current OCP (6.5–8.5A), negative-current limiting (−4A to −1A), and non-latch OVP triggered at 117–123% V_FB.

Key Specifications

Pinout & Package

The MP8760GLE-Z is housed in a thermally enhanced 16-pin QFN package (3mm × 4mm, 0.5mm pitch) with exposed thermal pad (PGND-connected). Pin 1 is marked by dot; top-side marking reads "MP8760E".

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar synchronous step-down converter applications.

Compared with MP2236DJ-LF-P and RT7295BGJ8F, the MP8760GLE-Z delivers superior light-load efficiency via skip-mode DCM, faster transient response due to adaptive COT architecture, and guaranteed monotonic startup-making it optimal for FPGA, ASIC, and RFIC core rails demanding reliability under dynamic load and pre-biased conditions.

Availability

MP8760GLE-Z is available at Aetrix Electronics and suitable for set-top box power rails, XDSL modem core supplies, and flat-panel TV main logic rails requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.

Supply support for MP8760GLE-Z includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and power ICs, with design centers in the US, China, and Taiwan, and global manufacturing partnerships.

The MP8760 belongs to MPS's high-current synchronous buck converter product line, engineered for space-constrained, thermally demanding applications such as broadband infrastructure, consumer electronics, and industrial computing where integration, efficiency, and reliability are critical.

FAQ

What is the minimum recommended output capacitance for stable operation?

The MP8760GLE-Z requires ≥220µF total output capacitance with ≤5mΩ ESR for stable CCM operation at 6A. Ceramic capacitors alone are insufficient; use POSCAP or polymer-aluminum hybrids to meet ESR requirements while minimizing size. Layout must minimize FB trace inductance-place feedback resistors within 2mm of the FB pin.

Can the MP8760GLE-Z operate with a 2.5V input supply?

Yes-but only when an external 5V bias is applied to the VCC pin, which disables the internal LDO and allows VIN down to 2.5V. Without external VCC bias, the minimum input is 4.5V due to internal LDO dropout. The EN pin must still be pulled above 1.1V to enable operation.

How does the FREQ pin resistor value affect switching frequency accuracy?

A 453kΩ resistor from FREQ to IN sets nominal 600kHz at VIN=12V. Frequency varies ±5% across VIN (4.5V–18V) due to feed-forward scaling; tolerance depends on resistor accuracy and layout parasitics. For precise f_SW, use 1% metal-film resistor and minimize trace length between FREQ and IN.

Is the thermal pad (EPAD) electrically connected internally?

Yes-the exposed thermal pad is internally tied to PGND and must be soldered to a solid copper pour connected to the system PGND plane using ≥6 thermal vias (0.3mm diameter). Failure to connect the EPAD degrades θ_JA by >20°C/W and risks thermal shutdown under 4A+ load.

Does the MP8760GLE-Z support forced PWM mode to eliminate acoustic noise?

No-it lacks a MODE pin or external control for forced PWM. It auto-transitions between CCM (PWM) and DCM (skip-mode) based on load. Acoustic noise from light-load switching can be mitigated by selecting higher ESR output capacitors or adding a small resistive load to maintain CCM operation above ~200mA.

What happens during pre-bias startup if the output voltage exceeds the target V_OUT?

The MP8760GLE-Z disables both HS- and LS-FETs until the SS capacitor voltage exceeds the sensed FB voltage. If V_OUT is significantly higher than target (e.g., >110%), the device remains in standby; no reverse current flows, and the output discharges only through load leakage. Once SS voltage surpasses FB, normal soft-start resumes.

How is the power-good (PG) signal debounced against noise on the FB pin?

PG assertion includes a 2.5ms delay after FB reaches 91% V_REF, and deassertion occurs only when FB falls below 80% V_REF-providing 11% hysteresis. This inherent window plus internal comparator filtering prevents false toggling from typical FB ripple (<10mV p-p) or brief transients.