Monolithic Power Systems Inc. MP8762GL-P
- Part No.:
- MP8762GL-P
- Manufacturer:
- Monolithic Power Systems Inc.
- Package:
- 13-VFQFN
- Datasheet:
-
MP8762GL-P.pdf
- Description:
- IC REG BUCK ADJ 10A 13QFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
MP8762GL-P from Monolithic Power Systems is a fully integrated, high-frequency synchronous step-down DC/DC converter delivering 10A output current with input range of 4.5V–18V (internal bias) or 2.5V–18V (external 5V bias), 0.611V–13V adjustable output voltage, and programmable switching frequency from 200kHz to 1MHz. It employs adaptive Constant-On-Time (COT) control for ultrafast transient response in telecom power supplies and distributed systems.
For engineers reviewing the MP8762GL-P datasheet, MP8762GL-P pinout, MP8762GL-P application, or MP8762GL-P equivalent, key selection criteria include its non-latch OCP/OVP protection, 1% reference voltage accuracy over –40°C to +125°C, pre-bias startup capability, open-drain power-good signal with 2.5ms delay, and QFN-13 (3×4mm) package with validated thermal resistance (θJA = 46°C/W).
Technical Context
The MP8762GL-P implements adaptive COT control with feed-forward compensation, enabling near-constant switching frequency across input voltage variation while maintaining fast load-step response. Its internal high-side (21mΩ) and low-side (7mΩ) MOSFETs support continuous conduction mode (CCM) up to 10A and discontinuous conduction mode (DCM) at light loads via current-modulator–assisted skip-mode operation.
It integrates VCC LDO (4.8V, 5mA), programmable UVLO threshold (3.8V default, adjustable via EN resistor network), soft-start timing controlled by external capacitor (20µA charging current), and open-drain PG with 91% rising/80% falling thresholds referenced to FB. Protection includes cycle-by-cycle high-side peak OCP (17.3A), low-side valley OCP (9.5–12.5A), negative-current limiting (–4A to –1A), and thermal shutdown at 150°C with 25°C hysteresis.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 4.5V–18V (internal bias); extends to 2.5V–18V with external 5V VCC bias - enables compatibility with wide-input industrial rails and battery-backed systems. |
| Output Current | 10A continuous - supports high-power FPGA, ASIC, and SoC core rails without external MOSFETs. |
| Output Voltage Range | 0.611V–13V (adjustable via FB resistor divider) - covers DDR memory, CPU cores, and intermediate bus voltages. |
| Switching Frequency | 200kHz–1MHz (programmable via FREQ-to-IN resistor) - balances efficiency vs. size: 500kHz typical for optimal LC filter footprint in space-constrained designs. |
| Reference Voltage Accuracy | ±1% over –40°C to +125°C junction temperature - ensures stable regulation under thermal stress in base stations and set-top boxes. |
| Power Good Threshold | Rising: 91% VFB; falling: 80% VFB with 2.5ms delay - provides reliable system sequencing and fault detection for downstream logic. |
| Thermal Shutdown | 150°C with 25°C hysteresis - protects against sustained overload or poor PCB heatsinking in sealed enclosures. |
Pinout & Package
MP8762GL-P is housed in a thermally enhanced QFN-13 (3mm × 4mm) package with exposed thermal pad (PGND-connected). Pin layout follows standard MPS 13-pin top view: pins 1–13 assigned as EN, FREQ, FB, SS, AGND, PG, VCC, BST, SW, IN, PGND, PGND, SW - optimized for minimal loop area and thermal performance.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| EN (Pin 1) | Enable control input | Digital on/off control; supports automatic startup via resistor divider; internal 1.3V threshold with 250mV hysteresis. |
| FREQ (Pin 2) | Frequency programming node | Connects to IN via resistor to set switching frequency and enable line feed-forward - maintains stable fSW across input variation. |
| FB (Pin 3) | Feedback sensing input | Monitors output via resistor divider; references 611mV internal bandgap - sets VOUT = 0.611V × (1 + R1/R2). |
| SS (Pin 4) | Soft-start timing node | Accepts external capacitor charged at 20µA - controls output ramp rate to prevent inrush current and OCP triggering. |
| AGND (Pin 5) | Analog ground reference | Separate ground for control circuitry - must be star-connected to PGND near IC to minimize noise coupling into feedback path. |
| PG (Pin 6) | Open-drain power-good indicator | Pulled low during startup/fault; pulled high after VFB ≥ 91% VREF with 2.5ms delay - used for system reset or enable sequencing. |
| VCC (Pin 7) | Internal LDO output (4.8V) | Supplies gate drivers and control logic; decoupled with ≥1µF X7R/X5R ceramic - bypassed when external 5V bias applied. |
| BST (Pin 8) | Bootstrap supply for high-side driver | Requires 0.1µF ceramic capacitor between BST and SW - sustains gate drive voltage during HS-FET conduction. |
| SW (Pins 9 & 13) | Power switch node | Drives external inductor; swings from ~0V to VIN; requires wide copper pour and multiple vias for low-inductance routing. |
| IN (Pin 12) | Main input supply | Accepts 2.5V–18V (with external bias) or 4.5V–18V (internal bias); requires local 10µF+ ceramic input capacitor. |
| PGND (Pins 10, 11) | Power ground return | High-current return path for both MOSFETs and inductor - must be solid plane connected directly under IC thermal pad. |
Key Features
| Feature | Design Value |
|---|---|
| Adaptive COT control | Eliminates external compensation components and delivers <10µs load-step response - critical for burst-mode processors and GPU power rails. |
| Pre-bias startup | Allows safe monotonic ramp-up into pre-charged outputs (e.g., hot-swap backplanes) without reverse current or latch-up. |
| Proprietary switching loss reduction | Optimizes dead-time and gate drive slew rates - achieves >92% peak efficiency at 12VIN/1VOUT/5A without external Schottky diode. |
| Non-latch OCP with three thresholds | Enables graceful recovery from short-circuit events: peak (17.3A), valley (9.5–12.5A), and negative current (–4A to –1A) limits protect against shoot-through and inductor saturation. |
| Programmable soft start | External capacitor sets ramp time - prevents overshoot and inrush in multi-rail systems where sequencing matters (e.g., FPGA configuration). |
Applications
| Set-top Box Power Rails | XDSL Modem Core Supply |
|---|---|
|
Use Scenario: Powers SoC, video decoder, and memory subsystems in cable/satellite STBs requiring clean, sequenced 1.2V/3.3V rails. IC Role / Device Role / Timing Role: Primary synchronous buck regulator delivering 10A at 1.2V with tight load regulation (<±1%) and fast transient response to video frame bursts. Use Value: Adaptive COT eliminates need for external loop compensation; PG signal synchronizes HDMI controller enable with stable VDD. |
Use Scenario: Supplies DSL PHY and line-driver ICs in residential broadband modems operating from 12V wall adapters. IC Role / Device Role / Timing Role: High-efficiency step-down converter generating 3.3V/5V from unregulated 12V input, supporting dynamic line-rate changes. Use Value: Pre-bias startup avoids brownout during firmware update; 200kHz–1MHz frequency tuning allows EMI spread-spectrum alignment with ADSL2+ clock domains. |
| Small-cell Base Station RF Front-end | Distributed Power System Intermediate Bus |
|
Use Scenario: Provides 5V/6A bias to GaN PA modules and analog front-end ICs in LTE/5G pico-cells deployed in temperature-varying outdoor cabinets. IC Role / Device Role / Timing Role: Thermally robust DC/DC stage with 150°C shutdown and 1% VREF stability - maintains PA linearity across –40°C to +85°C ambient. Use Value: Low RDS(ON) MOSFETs (21mΩ/7mΩ) reduce conduction loss; QFN-13 package enables compact 2-layer PCB layout near antenna module. |
Use Scenario: Serves as intermediate bus converter (12V→5V/10A) feeding multiple point-of-load regulators in modular server PSUs and industrial PLCs. IC Role / Device Role / Timing Role: High-current, high-reliability buck stage with non-latch OCP - isolates downstream POL faults without system-wide shutdown. Use Value: Programmable frequency avoids beat frequencies with adjacent converters; PG signal feeds upstream supervisor IC for cascaded fault reporting. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous step-down converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MP8771GQ-P | Successor device in same family; QFN-16 (3×4mm); improved thermal resistance (θJA = 40°C/W); 12A rating; supports 2.5V–18V input with internal bias only. | Recommended for new designs per MPS documentation; higher current headroom and better thermal margin for 5G infrastructure upgrades. | Select MP8771GQ-P when designing new products requiring extended lifetime, higher reliability, or future-proofing beyond 10A peak loads. |
| RTQ2132BGQW | Richtek part; QFN-16 (3×3mm); 12A; 2.5V–18V input; fixed 500kHz fSW; no programmable soft start; different PG logic (active-high push-pull). | Lacks adaptive COT and pre-bias startup; requires external compensation; suitable for cost-sensitive consumer electronics with fixed-frequency EMI constraints. | Choose RTQ2132BGQW only if board space is tighter (3×3mm vs. 3×4mm), fixed frequency suffices, and PG interface matches existing supervisor ICs. |
Compared with MP8762GL-P, MP8771GQ-P offers higher current, better thermal performance, and full design continuity, while RTQ2132BGQW trades control flexibility for smaller footprint and lower BOM count - making MP8762GL-P optimal for legacy-replacement or thermally constrained 10A applications where COT responsiveness is essential.
Availability
MP8762GL-P is available at Aetrix Electronics and suitable for set-top box power rails, XDSL modem core supplies, small-cell base station RF front-ends, and distributed power system intermediate buses requiring stable component supply, long-term lifecycle assurance, and RoHS-compliant packaging.
Supply support for MP8762GL-P includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and power ICs, with design centers in the US, China, and Taiwan, and global manufacturing partnerships.
The MP8762 belongs to MPS's high-current synchronous buck converter product line, engineered for telecom infrastructure, networking equipment, and industrial systems demanding high efficiency, fast transient response, and robust protection in compact form factors.
FAQ
What is the maximum recommended input voltage for MP8762GL-P?
The absolute maximum input voltage is 21V, but the recommended operating range is 4.5V to 18V when using internal VCC bias, or 2.5V to 18V with external 5V bias. Exceeding 18V risks violating SOA limits during transients and may trigger OVP before reaching 21V - sustained operation above 18V is not advised per datasheet specifications.
Can MP8762GL-P start up into a pre-biased output?
Yes. MP8762GL-P supports monotonic pre-bias startup: when the FB voltage exceeds the SS capacitor voltage at power-on, both high-side and low-side MOSFETs remain off until SS voltage rises above the sensed output, preventing reverse current flow and ensuring controlled ramp-up even into charged capacitors.
How is switching frequency programmed on MP8762GL-P?
Switching frequency is set by connecting a resistor (RFREQ) between the FREQ pin and the IN pin. Using RFREQ = 453kΩ yields ~500kHz at VIN = 12V; the relationship is fSW(kHz) ≈ 6.1 × RFREQ(kΩ) × VIN(V) / 0.4. Feed-forward compensation maintains frequency stability across input voltage variation.
What is the purpose of the BST pin, and what capacitor value is required?
The BST pin supplies the floating gate drive voltage for the high-side MOSFET. A 0.1µF X7R ceramic capacitor must be placed between BST and SW pins. This capacitor replenishes charge lost during each switching cycle and ensures sufficient gate-source voltage (>5V) to maintain low RDS(ON) during conduction.
Does MP8762GL-P provide output voltage tracking?
No. MP8762GL-P does not include dedicated voltage tracking functionality. Output voltage is set solely by the FB resistor divider. For multi-rail tracking, external circuitry (e.g., active tracking ICs or matched resistor networks with shared SS node) must be implemented - the device itself lacks programmable tracking or margining features.
What thermal derating applies above +25°C ambient?
Derating follows PD(MAX) = (TJ(MAX) − TA) / θJA, where θJA = 46°C/W. At TA = 70°C, max dissipation drops to (150 − 70) / 46 ≈ 1.74W. With typical 92% efficiency at 12VIN/1VOUT/10A, power loss is ~0.87W - well within limit. Above 85°C ambient, forced airflow or enhanced copper pour is recommended.
Is MP8762GL-P pin-compatible with MP8771GQ-P?
No. MP8762GL-P uses a 13-pin QFN layout, while MP8771GQ-P uses a 16-pin QFN with different pin assignments (e.g., additional PGND and SW pins). The datasheets explicitly state MP8771 is "recommended for new designs" and not a drop-in replacement - PCB redesign and layout revision are required for migration.
MP8762GL-P Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Monolithic Power Systems Inc.
- Series:
- -
- Package/Case:
- 13-VFQFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Not For New Designs
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 4.5V
- Voltage - Input (Max):
- 18V
- Voltage - Output (Min/Fixed):
- 0.611V
- Voltage - Output (Max):
- 13V
- Current - Output:
- 10A
- Frequency - Switching:
- 200kHz ~ 1MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 13-QFN (3x4)
MP8762GL-P FAQ
1.How can I place an order for MP8762GL-P through Aetrix?
Please submit a Request for Quotation (RFQ) for MP8762GL-P on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MP8762GL-P reliable?
The price and inventory of MP8762GL-P are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MP8762GL-P is usually 5 days.
3.What payment methods are accepted for MP8762GL-P?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MP8762GL-P transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MP8762GL-P?
MP8762GL-P orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MP8762GL-P order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MP8762GL-P?
For technical support, including MP8762GL-P datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MP8762GL-P requirements.
6.How does Aetrix verify that MP8762GL-P is sourced from the original manufacturer or authorized distributors?
All MP8762GL-P products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MP8762GL-P meets industry standards.
7.What is the process for return or replacement of MP8762GL-P?
All MP8762GL-P units undergo pre-shipment inspection (PSI). If there is an issue with MP8762GL-P, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MP8762GL-P part is unused and in its original packaging.
Return procedure for MP8762GL-P:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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