Monolithic Power Systems Inc. MP8763GL-P
- Part No.:
- MP8763GL-P
- Manufacturer:
- Monolithic Power Systems Inc.
- Package:
- 13-VFQFN
- Datasheet:
-
MP8763GL-P.pdf
- Description:
- IC REG BUCK ADJ 12A 13QFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
MP8763GL-P from Monolithic Power Systems is a fully integrated, synchronous step-down DC/DC converter delivering 12A output current with 2.5V–18V input range (external 5V bias) or 4.5V–18V (internal bias), 0.611V–13V adjustable output, and adaptive Constant-On-Time control for ultrafast transient response in compact distributed power systems.
For engineers reviewing the MP8763GL-P datasheet, MP8763GL-P pinout, MP8763GL-P application, or MP8763GL-P equivalent, key selection criteria include its 19.6mΩ high-side / 5.2mΩ low-side MOSFET RDS(ON), non-latch OCP/OVP/thermal shutdown, programmable 200kHz–1MHz switching frequency via FREQ pin, and pre-bias start-up capability for reliable power sequencing in set-top boxes and small-cell base stations.
Technical Context
The MP8763GL-P implements adaptive Constant-On-Time (COT) control without an external oscillator, using input voltage feed-forward through the FREQ pin to maintain stable switching frequency across input variations. Its internal 4.8V LDO powers control circuitry, while bootstrap (BST) and switch (SW) pins drive the integrated high-side MOSFET with 30ns minimum ON time and 360ns minimum OFF time.
It supports both continuous-conduction-mode (CCM) at heavy loads and skip-mode DCM at light loads to maximize efficiency across the full 0–12A range. Protection includes valley-current OCP (12–18A), negative-current limiting (−4A to −1A), 120% VFB non-latch OVP with 2μs delay, and thermal shutdown at 150°C with 25°C hysteresis.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Current | 12A continuous - supports high-power SoC rails in flat-panel TVs and personal video recorders without external current boosting. |
| Input Voltage Range | 2.5V–18V (with external 5V bias) or 4.5V–18V (internal bias) - enables flexible front-end sourcing from 3.3V, 5V, 12V, or PoE-derived supplies. |
| Output Voltage Range | 0.611V–13V - covers core logic (0.8V), I/O (1.8V/3.3V), and auxiliary rails (5V/12V) via resistor divider on FB pin. |
| Switching Frequency | 200kHz–1MHz (programmable via RFREQ) - balances efficiency vs. size: 500kHz typical for 1µH inductor + ceramic output caps in space-constrained designs. |
| RDS(ON) | 19.6mΩ (HS) / 5.2mΩ (LS) - reduces conduction loss and thermal stress at 12A, enabling operation without forced air in industrial ambient (−40°C to +125°C). |
| Reference Voltage | 611mV ±9mV over −40°C to +125°C - ensures ≤±1% output accuracy across junction temperature, critical for DDR memory and FPGA core supplies. |
| Soft-Start | Programmable via external capacitor on SS pin - prevents inrush current into large output capacitors (e.g., ≥1000µF) during cold-start in set-top box applications. |
Pinout & Package
MP8763GL-P is housed in a thermally enhanced 3mm×4mm QFN-16 package with exposed thermal pad (PGND-connected), optimized for high-current PCB layouts requiring wide traces and multiple vias to PGND.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| EN | Enable control input | Digital ON/OFF control; internal 1.3V threshold with 250mV hysteresis; supports automatic startup via resistive divider from IN. |
| FREQ | Frequency programming node | Connects to IN via resistor (e.g., 453kΩ for ~500kHz); provides line feed-forward to stabilize switching frequency across VIN variation. |
| FB | Feedback sensing input | Monitors output via resistor divider; sets VOUT = 0.611V × (1 + R1/R2); also triggers OVP when VFB exceeds 120% VREF. |
| SS | Soft-start timing node | Charged by 20μA internal current source; controls output ramp rate; prevents current limit trip during startup into pre-biased loads. |
| PG | Open-drain power-good signal | Asserts HIGH after 2.5ms delay when VFB ≥ 91% VREF; deasserts LOW if VFB drops below 80% or exceeds 120% VREF - enables system sequencing and fault detection. |
| VCC | Internal LDO output | 4.8V ±0.15V regulated supply for gate drivers and control logic; bypassed with ≥1µF X7R/X5R ceramic; disabled when external 5V applied. |
| BST | Bootstrap supply for HS-FET driver | Requires 0.1µF ceramic capacitor between BST and SW; enables high-side NMOS drive above VIN; critical for >90% duty-cycle operation. |
| SW | Power switch node | Connects to inductor and BST cap; swings from −0.3V to VIN+0.3V; requires wide copper pour and minimal trace inductance for EMI and efficiency. |
| IN | Main power input | Supplies internal MOSFETs and LDO; accepts 2.5V–18V (with external bias) or 4.5V–18V (internal bias); requires ≥10µF input ceramic decoupling near pin. |
| PGND | Power ground return | High-current return path for LS-FET and output capacitor; must be solid copper plane tied to thermal pad; separate from AGND to avoid noise coupling. |
| AGND | Analog ground reference | Low-noise reference for FB, SS, EN, and internal error amplifier; connected to PGND at single point near IC to prevent ground bounce. |
Key Features
| Feature | Design Value |
|---|---|
| Adaptive COT control | Eliminates external compensation network; achieves <10µs load-step response with 1% reference stability across −40°C to +125°C. |
| Proprietary switching-loss reduction | Optimizes dead-time and gate drive slew rates to minimize shoot-through and body-diode conduction losses at 12A. |
| Pre-bias start-up | Disables switching until SS voltage exceeds FB voltage - ensures monotonic ramp-up into powered-backup or hot-swap systems. |
| Non-latch protection suite | OCP, OVP, and thermal shutdown recover automatically after fault clears - avoids system lockup in intermittent overload conditions. |
| Programmable soft-start | Adjustable ramp time via external SS capacitor (e.g., 100nF = ~3ms) - prevents inrush into large bulk capacitance without sacrificing startup speed. |
Applications
| Set-Top Boxes | XDSL Modem / DSLAM |
|---|---|
|
Use Scenario: Powering multi-core SoC, DDR3 memory, and HDMI PHY from 12V wall adapter. IC Role / Device Role / Timing Role: Primary 1.2V/3A and 3.3V/2A POL regulator with fast transient response to handle bursty video decode workloads. Use Value: Adaptive COT maintains <±15mV output deviation during 6A load steps, preventing frame drop or audio glitch. |
Use Scenario: Generating 1.8V, 2.5V, and 5V rails for DSL line card ASICs and analog front-end in carrier-grade DSLAM chassis. IC Role / Device Role / Timing Role: High-efficiency intermediate bus converter feeding downstream LDOs; operates at 500kHz to minimize EMI in dense line card layout. Use Value: 19.6mΩ/5.2mΩ RDS(ON) delivers >92% peak efficiency at 12A, reducing thermal load in fanless DSLAM enclosures. |
| Small-Cell Base Stations | Flat-Panel Televisions |
|
Use Scenario: Supplying 0.85V/10A CPU core and 1.1V/4A memory rail for LTE/5G small-cell radio units in outdoor cabinets. IC Role / Device Role / Timing Role: High-current POL regulator with thermal shutdown at 150°C and 25°C hysteresis for uncooled deployment. Use Value: Pre-bias start-up ensures clean power sequencing when hot-swapping radio modules without disrupting adjacent cells. |
Use Scenario: Delivering 12V backlight boost and 3.3V logic supply in slim LED TV mainboards with strict height constraints. IC Role / Device Role / Timing Role: Compact 3mm×4mm step-down converter replacing discrete buck controllers + external MOSFETs. Use Value: Integrated 12A capability eliminates external power stage, reducing BOM count by 7 components and saving 25mm² PCB area. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar synchronous step-down converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MPQ8763GL-P | Automotive-grade AEC-Q100 qualified version with extended temperature range (−40°C to +150°C) and enhanced ESD robustness (±8kV HBM). | Required for automotive infotainment head units and ADAS domain controllers where qualification is mandatory. | Select MPQ8763GL-P only when automotive qualification is required; identical electrical specs and pinout enable drop-in replacement in qualified designs. |
| RTQ2132BGQW | 3A rated, 2.7V–18V input, 0.6V–5.5V output; uses peak-current-mode control with external compensation; lacks pre-bias start-up and programmable frequency. | Suitable for lower-current auxiliary rails (e.g., sensor bias, USB PD controller) where 12A capability is unnecessary. | Choose RTQ2132BGQW for cost-sensitive, low-power subsystems where MP8763GL-P's 12A capacity is over-provisioned. |
Compared with MP8763GL-P, MPQ8763GL-P adds automotive qualification without altering performance, while RTQ2132BGQW trades current capability and advanced features for lower cost and simpler design in sub-5A applications - enabling tiered BOM optimization across product families.
Availability
MP8763GL-P is available at Aetrix Electronics and suitable for set-top boxes, small-cell base stations, flat-panel televisions, and distributed power systems requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for MP8763GL-P includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and power ICs, with over 20 years of leadership in DC/DC conversion, motor drivers, and LED lighting solutions.
The MP8763 belongs to MPS's high-current monolithic buck converter product line, engineered for space-constrained, high-efficiency power delivery in consumer, telecom, and industrial equipment where integration, thermal performance, and transient response are critical.
FAQ
What is the minimum recommended input capacitance for MP8763GL-P?
The datasheet specifies ≥10µF ceramic input capacitance placed as close as possible to the IN and PGND pins. This value ensures stable operation under 12A load transients and suppresses high-frequency switching noise. Use X7R or X5R dielectric types rated for ≥16V with low ESL; parallel with 1µF for broadband filtering if operating above 500kHz.
Can MP8763GL-P operate with a 2.5V input supply?
Yes - MP8763GL-P supports 2.5V–18V input when an external 5V bias is supplied to the VCC pin, disabling the internal LDO. Without external bias, the minimum input is 4.5V to sustain internal regulation. The 2.5V capability enables direct use with Li-ion battery packs or low-voltage PoE variants.
How does the MP8763GL-P handle pre-biased outputs during startup?
MP8763GL-P monitors FB voltage versus SS capacitor voltage at power-on. If FB > SS voltage, both high-side and low-side MOSFETs remain off until SS voltage exceeds FB, ensuring monotonic output rise without reverse current flow - essential for hot-swap and redundant power systems.
What is the purpose of the FREQ pin beyond setting switching frequency?
The FREQ pin provides line feed-forward compensation: connecting it to IN via RFREQ ties the one-shot ON-time timer directly to input voltage, maintaining nearly constant switching frequency across VIN variation (e.g., 4.5V to 18V). This eliminates need for complex loop compensation in wide-input applications.
Is the PG (Power Good) signal compatible with 3.3V logic systems?
Yes - PG is an open-drain output requiring an external pull-up resistor (typically 100kΩ) to any DC voltage ≤5.5V. When pulled to 3.3V, it asserts HIGH at ≥2.7V (91% of 3.3V × 0.611V reference ratio) and deasserts LOW at ≤2.64V (80% threshold), providing clean interface to 3.3V microcontrollers and CPLDs.
Does MP8763GL-P require an external ramp circuit for stability?
Stability depends on output capacitor ESR: with POSCAPs or polymer caps (ESR > 5mΩ), the inherent ESR ripple provides sufficient slope for COT stability. With low-ESR ceramics (<2mΩ), an external ramp (R4/C4 network) is required per Equation 5 in the datasheet to prevent subharmonic oscillation in PWM mode.
What thermal derating applies above +85°C ambient?
Using θJA = 46°C/W, maximum continuous power dissipation drops linearly: at +85°C ambient, PDMAX = (150°C − 85°C)/46 = 1.41W. At 12A output, this corresponds to ~117mV total voltage drop (RDS(ON) + inductor DCR), requiring careful thermal layout with 2oz copper and 6+ thermal vias to inner ground planes.
MP8763GL-P Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Monolithic Power Systems Inc.
- Series:
- -
- Package/Case:
- 13-VFQFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Not For New Designs
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Output Type:
- Adjustable
- Number of Outputs:
- 1
- Voltage - Input (Min):
- 4.5V
- Voltage - Input (Max):
- 18V
- Voltage - Output (Min/Fixed):
- 0.611V
- Voltage - Output (Max):
- 13V
- Current - Output:
- 12A
- Frequency - Switching:
- 200kHz ~ 1MHz
- Synchronous Rectifier:
- Yes
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 13-QFN (3x4)
MP8763GL-P FAQ
1.How can I place an order for MP8763GL-P through Aetrix?
Please submit a Request for Quotation (RFQ) for MP8763GL-P on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MP8763GL-P reliable?
The price and inventory of MP8763GL-P are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MP8763GL-P is usually 5 days.
3.What payment methods are accepted for MP8763GL-P?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MP8763GL-P transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MP8763GL-P?
MP8763GL-P orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MP8763GL-P order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MP8763GL-P?
For technical support, including MP8763GL-P datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MP8763GL-P requirements.
6.How does Aetrix verify that MP8763GL-P is sourced from the original manufacturer or authorized distributors?
All MP8763GL-P products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MP8763GL-P meets industry standards.
7.What is the process for return or replacement of MP8763GL-P?
All MP8763GL-P units undergo pre-shipment inspection (PSI). If there is an issue with MP8763GL-P, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MP8763GL-P part is unused and in its original packaging.
Return procedure for MP8763GL-P:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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