Monolithic Power Systems Inc. MP8765GQ-Z

Overview

MP8765GQ-Z from Monolithic Power Systems is a fully integrated 5V–24V input, 6A synchronous step-down DC/DC converter with Constant-On-Time (COT) control, 500kHz switching frequency, 1% reference voltage accuracy, and integrated 38mΩ/15mΩ MOSFETs. It delivers high efficiency across load range in laptop power rails, tablet core supplies, and distributed 5V/3.3V systems.

For engineers reviewing the MP8765GQ-Z datasheet, MP8765GQ-Z pinout, MP8765GQ-Z application, or MP8765GQ-Z equivalent, key selection criteria include its PFM/PWM mode selectability, hiccup OCP with valley current sensing, 7ms internal soft start, output discharge capability, and QFN16 (3mm×3mm) thermal performance with θJA = 70°C/W.

Technical Context

The MP8765GQ-Z employs proprietary COT control with internal ramp compensation, enabling stable regulation with ceramic output capacitors without external ESR dependency. Its valley-current-based OCP uses low-side R_DS(ON) as the current-sense element, eliminating external sense resistors.

It integrates dual MOSFETs, a 5V VCC LDO, open-drain power-good (PG) with 95%/85% V_REF thresholds and 0.5ms delay, and auto-retry OVP that transitions between dynamic regulation and saturated discharge modes depending on overvoltage severity.

Key Specifications

Pinout & Package

MP8765GQ-Z is housed in a thermally enhanced QFN16 package (3mm × 3mm, 0.5mm pitch) with exposed thermal pad (pins 8 & 9). The package supports ≤1.8W continuous power dissipation at T_A = +25°C and provides low θ_JA = 70°C/W on standard 4-layer PCBs.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar synchronous step-down converter applications.

Compared with RT6253BGQW and TPS546B24RVFT, MP8765GQ-Z offers superior light-load efficiency via selectable PFM, integrated output discharge for system-level safety, and simpler implementation with no external bootstrap diode or digital interface overhead.

Availability

MP8765GQ-Z is available at Aetrix Electronics and suitable for laptop power subsystems, tablet SoC supplies, and networking auxiliary rails requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.

Supply support for MP8765GQ-Z includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and power ICs, with design centers in the US, China, and Taiwan, and global manufacturing partnerships.

The MP8765 belongs to MPS's high-current synchronous buck converter product line, engineered for space-constrained, thermally demanding applications in portable computing and infrastructure equipment where integration, efficiency, and reliability are critical.

FAQ

What is the minimum recommended input voltage for reliable startup?

The MP8765GQ-Z has an internal VCC UVLO threshold of 4.6V (rising), but functional startup requires VIN ≥5V to ensure sufficient headroom for the internal 5V LDO and gate drive. Below 5V, the device may not initiate switching even if EN is asserted, and output regulation cannot be guaranteed.

Can the MODE pin be left unconnected for forced PWM operation?

Yes - leaving the MODE pin floating (no external connection) configures the MP8765GQ-Z for forced PWM mode across all load conditions. This ensures constant 500kHz switching, reduced output voltage ripple, and predictable EMI behavior, ideal for noise-sensitive applications like audio or RF subsystems.

How does the internal output discharge function interact with external circuits?

The internal 6Ω discharge FET connects between VOUT and PGND and activates only when EN = low or during fault shutdown (OVP/OCP/UVLO/thermal). It does not interfere with normal operation and avoids negative voltage generation by keeping the external low-side MOSFET off during discharge, ensuring safe, controlled VOUT ramp-down.

Is an external ramp compensation network required for stability with ceramic output capacitors?

No - the MP8765GQ-Z includes built-in ramp compensation optimized for ceramic output capacitors. Stability is achieved without external components under typical conditions (e.g., 1.2µH inductor, 22µF ×2 X5R ceramics). External ramp is only needed in edge cases with very low-ESR caps or extreme layout parasitics.

What is the maximum allowable voltage on the SW pin during turn-off?

The SW pin is rated for –3V (for 30ns) and –6V (for 5ns) undershoot. This accounts for inductive kickback during low-side FET turn-off. Layout best practices - short SW traces, minimized loop area, and proper grounding - are essential to keep undershoot within these limits and prevent latch-up or damage.

Does the power-good (PG) signal remain valid during thermal shutdown?

No - the PG signal is actively pulled low during thermal shutdown, OCP hiccup, OVP saturation, or UVLO events. It only asserts high when VOUT is within 95–115% of the target voltage *and* the device is operating in steady-state regulation, providing a true system-ready indication.